SLVSET1 August   2018 DRV8873

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bridge Control
        1. 7.3.1.1 Control Modes
        2. 7.3.1.2 Half-Bridge Operation
        3. 7.3.1.3 Internal Current Sense and Current Regulation
        4. 7.3.1.4 Slew-Rate Control
        5. 7.3.1.5 Dead Time
        6. 7.3.1.6 Propagation Delay
        7. 7.3.1.7 nFAULT Pin
        8. 7.3.1.8 nSLEEP as SDO Reference
      2. 7.3.2 Motor Driver Protection Circuits
        1. 7.3.2.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.2.2 VCP Undervoltage Lockout (CPUV)
        3. 7.3.2.3 Overcurrent Protection (OCP)
          1. 7.3.2.3.1 Latched Shutdown (OCP_MODE = 00b)
          2. 7.3.2.3.2 Automatic Retry (OCP_MODE = 01b)
          3. 7.3.2.3.3 Report Only (OCP_MODE = 10b)
          4. 7.3.2.3.4 Disabled (OCP_MODE = 11b)
        4. 7.3.2.4 Open-Load Detection (OLD)
          1. 7.3.2.4.1 Open-Load Detection in Passive Mode (OLP)
          2. 7.3.2.4.2 Open-Load Detection in Active Mode (OLA)
        5. 7.3.2.5 Thermal Shutdown (TSD)
          1. 7.3.2.5.1 Latched Shutdown (TSD_MODE = 0b)
          2. 7.3.2.5.2 Automatic Recovery (TSD_MODE = 1b)
        6. 7.3.2.6 Thermal Warning (OTW)
      3. 7.3.3 Hardware Interface
        1. 7.3.3.1 MODE (Tri-Level Input)
        2. 7.3.3.2 Slew Rate
    4. 7.4 Device Functional Modes
      1. 7.4.1 Motor Driver Functional Modes
        1. 7.4.1.1 Sleep Mode (nSLEEP = 0)
        2. 7.4.1.2 Disable Mode (nSLEEP = 1, DISABLE = 1)
        3. 7.4.1.3 Operating Mode (nSLEEP = 1, DISABLE = 0)
        4. 7.4.1.4 nSLEEP Reset Pulse
    5. 7.5 Programming
      1. 7.5.1 Serial Peripheral Interface (SPI) Communication
        1. 7.5.1.1 SPI Format
        2. 7.5.1.2 SPI for a Single Slave Device
        3. 7.5.1.3 SPI for Multiple Slave Devices in Parallel Configuration
        4. 7.5.1.4 SPI for Multiple Slave Devices in Daisy Chain Configuration
    6. 7.6 Register Maps
      1. 7.6.1 Status Registers
        1. 7.6.1.1 FAULT Status Register Name (address = 0x00)
          1. Table 21. FAULT Status Register Field Descriptions
        2. 7.6.1.2 DIAG Status Register Name (address = 0x01)
          1. Table 22. DIAG Status Register Field Descriptions
      2. 7.6.2 Control Registers
        1. 7.6.2.1 IC1 Control Register (address = 0x02)
          1. Table 24. IC1 Control Register Field Descriptions
        2. 7.6.2.2 IC2 Control Register (address = 0x03)
          1. Table 25. IC2 Control Register Field Descriptions
        3. 7.6.2.3 IC3 Control Register (address = 0x04)
          1. Table 26. IC3 Control Register Field Descriptions
        4. 7.6.2.4 IC4 Control Register (address = 0x05)
          1. Table 27. IC4 Control Register Field Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Motor Voltage
        2. 8.2.1.2 Drive Current and Power Dissipation
        3. 8.2.1.3 Sense Resistor
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Thermal Considerations
        2. 8.2.2.2 Heatsinking
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance Sizing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.2 Drive Current and Power Dissipation

The current path is through the high-side sourcing power driver, motor winding, and low-side sinking power driver. The amount of current the device can drive depends on the power dissipation without going into thermal shutdown. The amount of current that can be power dissipation losses in one source and sink power driver are calculated in Equation 2.

Equation 2. PD = (IRMS)2 × (RDS(on)High-side + RDS(on)Low-side)

The IOUT current is equal to the average current drawn by the DC motor. At 25°C ambient temperature, the power dissipation becomes (2.5 A)2 × (150 mΩ) = 0.94 W.

The temperature that the device reaches depends on the thermal resistance to the air and PCB. Soldering the device PowerPAD to the PCB ground plane, with vias to the top and bottom board layers, is important to dissipate heat into the PCB and reduce the device temperature. In the example used here, the device had an effective thermal resistance RθJA of 27.8°C/W. The junction temperature TJ value becomes as shown in Equation 3.

Equation 3. TJ = TA + (PD × RθJA) = 25°C + (0.94 W × 27.8°C/W) = 51°C

NOTE

The values of RDS(on) increases with temperature, so as the device heats, the power dissipation increases. This fact must be taken into consideration when sizing the heatsink.

At start-up and fault conditions, the current flowing through the motor is much higher than normal running current; these peak currents and their duration must also be considered. High PWM frequency also results in higher switching losses. Typically, switching the inputs at 100 kHz compared to 10 kHz causes 20% more power loss in heat.

Power dissipation in the device is dominated by the power dissipated of the internal MOSFET resistance. The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and heatsinking.

Total power dissipation for the device is composed of three main components. These are the quiescent supply current dissipation, the power MOSFET switching losses, and the power MOSFET RDS(ON) (conduction) losses. While other factors may contribute additional power losses, these other items are typically insignificant compared to the three main items.

Equation 4. PTOT = PVM + PSW + PD

PVM can be calculated from the nominal supply voltage (VM) and the supply current (IVM) in active mode.

Equation 5. PVM = VM × IVM = 13.5 V × 5 mA = 67.5 mW

PSW can be calculated from the nominal supply voltage (VM), average output current (IRMS), switching frequency (fPWM) and the device output rise and fall times (tSR) time specifications.

Equation 6. PSW = PSW_RISE + PSW_FALL = 0.17 W + 0.17 W = 0.34 W
Equation 7. PSW_RISE = 0.5 × VM × IRMS × tSR × fPWM = 0.5 × 13.5 V × 2.5 A × 1 µs × 10 kHz = 0.17 W
Equation 8. PSW_FALL = 0.5 × VM × IRMS × tSR × fPWM = 0.5 × 13.5 V × 2.5 A × 1 µs × 10 kHz = 0.17 W

Therefore, total power dissipation (PTOT) at 25°C ambient temperature becomes = PVM + PSW + PD = 67.5 mW + 0.34 W + 0.94 W = 1.35 W

PTOT makes the junction temperature (TJ) of the device to be

Equation 9. TJ = TA + (PTOT × RθJA) = 25°C + (1.35 W × 27.8°C/W) = 63°C

The power dissipation from power MOSFET switching losses and quiescent supply current dissipation results is approximately 12°C rise in the junction temperature (different between Equation 9 and Equation 3). Care must be taken when doing the PCB layout and heatsinking the motor driver device so that the thermal characteristics are properly managed.

DRV8873 drv8873-q1-pcb-model-layout.gifFigure 37. PCB Model (4-Layer PCB Shown, 2-Layer PCB Has No Vias)
DRV8873 D007_SLVSDY7.gifFigure 38. 4-Layer PCB
Junction-to-Ambient Thermal Resistance vs Copper Area
DRV8873 D009_SLVSDY7.gifFigure 40. 2-Layer PCB (No Vias)
Junction-to-Ambient Thermal Resistance vs Copper Area
DRV8873 D008_SLVSDY7.gifFigure 39. 4-Layer PCB
Junction-to-Board Characterization Parameter vs Copper Area
DRV8873 D010_SLVSDY7.gifFigure 41. 2-Layer PCB (No Vias)
Junction-to-Board Characterization Parameter vs Copper Area