SLVSFE6A August   2019  – April 2021 DRV8876N

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 External Components
      2. 7.3.2 Control Modes
        1. 7.3.2.1 PH/EN Control Mode (PMODE = Logic Low)
        2. 7.3.2.2 PWM Control Mode (PMODE = Logic High)
        3. 7.3.2.3 Independent Half-Bridge Control Mode (PMODE = Hi-Z)
      3. 7.3.3 Protection Circuits
        1. 7.3.3.1 VM Supply Undervoltage Lockout (UVLO)
        2. 7.3.3.2 VCP Charge Pump Undervoltage Lockout (CPUV)
        3. 7.3.3.3 OUTx Overcurrent Protection (OCP)
        4. 7.3.3.4 Thermal Shutdown (TSD)
        5. 7.3.3.5 Fault Condition Summary
      4. 7.3.4 Pin Diagrams
        1. 7.3.4.1 Logic-Level Inputs
        2. 7.3.4.2 Tri-Level Inputs
        3. 7.3.4.3 Quad-Level Inputs
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Low-Power Sleep Mode
      3. 7.4.3 Fault Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Primary Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Power Dissipation and Output Current Capability
          2. 8.2.1.2.2 Thermal Performance
            1. 8.2.1.2.2.1 Steady-State Thermal Performance
            2. 8.2.1.2.2.2 Transient Thermal Performance
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Alternative Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 HTSSOP Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
8.2.1.2.1 Power Dissipation and Output Current Capability

The output current and power dissipation capabilities of the device are heavily dependent on the PCB design and external system conditions. This section provides some guidelines for calculating these values.

Total power dissipation for the device is composed of three main components. These are the quiescent supply current dissipation, the power MOSFET switching losses. and the power MOSFET RDS(on) (conduction) losses. While other factors may contribute additional power losses, these other items are typically insignificant compared to the three main items.

Equation 1. PTOT = PVM + PSW + PRDS

PVM can be calculated from the nominal supply voltage (VM) and the IVM active mode current specification.

Equation 2. PVM = VM x IVM
Equation 3. PVM = 0.096 W = 24 V x 4 mA

PSW can be calculated from the nominal supply voltage (VM), average output current (IRMS), switching frequency (fPWM) and the device output rise (tRISE) and fall (tFALL) time specifications.

Equation 4. PSW = PSW_RISE + PSW_FALL
Equation 5. PSW_RISE = 0.5 x VM x IRMS x tRISE x fPWM
Equation 6. PSW_FALL = 0.5 x VM x IRMS x tFALL x fPWM
Equation 7. PSW_RISE = 0.018 W = 0.5 x 24 V x 0.5 A x 150 ns x 20 kHz
Equation 8. PSW_FALL = 0.018 W = 0.5 x 24 V x 0.5 A x 150 ns x 20 kHz
Equation 9. PSW = 0.036 W = 0.018 W + 0.018 W

PRDS can be calculated from the device RDS(on) and average output current (IRMS)

Equation 10. PRDS = IRMS2 x (RDS(ON)_HS + RDS(ON)_LS)

It should be noted that RDS(ON) has a strong correlation with the device temperature. A curve showing the normalized RDS(on) with temperature can be found in the Typical Characteristics curves. Assuming a device temperature of 85 °C it can be expected that RDS(on) will see an increase of ~1.25 based on the normalized temperature data.

Equation 11. PRDS = 0.219 W = (0.5 A)2 x (350 mΩ x 1.25 + 350 mΩ x 1.25)

By adding together the different power dissipation components it can be verified that the expected power dissipation and device junction temperature is within design targets.

Equation 12. PTOT = PVM + PSW + PRDS
Equation 13. PTOT = 0.351 W = 0.096 W + 0.036 W + 0.219 W

The device junction temperature can be calculated with the PTOT, device ambient temperature (TA), and package thermal resistance (RθJA). The value for RθJA is heavily dependent on the PCB design and copper heat sinking around the device.

Equation 14. TJ = (PTOT x RθJA) + TA
Equation 15. TJ = 97°C = (0.351 W x 35 °C/W) + 85°C

It should be ensured that the device junction temperature is within the specified operating region. Other methods exist for verifying the device junction temperature depending on the measurements available.

Additional information on motor driver current ratings and power dissipation can be found in Section 8.2.1.2.2 and Section 11.1.1.