SLVSFE6A August 2019 – April 2021 DRV8876N
PRODUCTION DATA
PIN | TYPE(1) | DESCRIPTION | ||
---|---|---|---|---|
NAME | PWP | |||
CPH | 13 | PWR | Charge pump switching node. Connect a X5R or X7R, 22-nF, VM-rated ceramic capacitor between the CPH and CPL pins. | |
CPL | 14 | PWR | ||
EN/IN1 | 1 | I | H-bridge control input. See Section 7.3.2. Internal pulldown resistor. | |
GND | 15 | PWR | Device ground. Connect to system ground. | |
IMODE | 7 | I | Overcurrent protection mode. See Section 7.3.3.3. Quad-level input. | |
nFAULT | 4 | OD | Fault indicator output. Pulled low during a fault condition. Connect an external pullup resistor for open-drain operation. See Section 7.3.3. | |
nSLEEP | 3 | I | Sleep mode input. Logic high to enable device. Logic low to enter low-power sleep mode. See Section 7.4. Internal pulldown resistor. | |
OUT1 | 8 | O | H-bridge output. Connect to the motor or other load. | |
OUT2 | 10 | O | H-bridge output. Connect to the motor or other load. | |
PGND | 9 | PWR | Device power ground. Connect to system ground. | |
PH/IN2 | 2 | I | H-bridge control input. See Section 7.3.2. Internal pulldown resistor. | |
PMODE | 16 | I | H-bridge control input mode. See Section 7.3.2. Tri-level input. | |
RSVD1 | 5 | I | Reserved pin. Connect to a voltage greater than 1 V. Recommend connecting this pin to the system logic supply rail or to nSLEEP. | |
RSVD2 | 6 | O | Reserved pin. Connect to system ground. | |
VCP | 12 | PWR | Charge pump output. Connect a X5R or X7R, 100-nF, 16-V ceramic capacitor between the VCP and VM pins. | |
VM | 11 | PWR | 4.5-V to 37-V power supply input. Connect a 0.1-µF bypass capacitor to ground, as well as sufficient Section 9.1 rated for VM. | |
PAD | — | — | Thermal pad. Connect to system ground. |