SLVSD18C June 2015 – August 2017 DRV8880
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
After the current is enabled in an H-bridge, the voltage on the xISEN pin is ignored for a period of time before enabling the current sense circuitry. Note that the blanking time also sets the minimum drive time of the PWM.
The blanking time is automatically scaled so that the drive time is reduced at lower current steps.
The time tBLANK is determined by the sine DAC code and the torque DAC setting. The timing information for tBLANK is given in Table 9.
SINE DAC CODE | TORQUE DAC TRQ[1:0] SETTING | |||
---|---|---|---|---|
00 – 100% | 01 – 75% | 10 – 50% | 11 – 25% | |
16 | 1.80 µs | 1.50 µs | 1.50 µs | 1.20 µs |
15 | 1.80 µs | 1.50 µs | 1.50 µs | 1.20 µs |
14 | 1.80 µs | 1.50 µs | 1.50 µs | 1.20 µs |
13 | 1.80 µs | 1.50 µs | 1.50 µs | 1.20 µs |
12 | 1.80 µs | 1.50 µs | 1.50 µs | 1.20 µs |
11 | 1.80 µs | 1.50 µs | 1.50 µs | 1.20 µs |
10 | 1.80 µs | 1.50 µs | 1.50 µs | 1.20 µs |
9 | 1.80 µs | 1.50 µs | 1.50 µs | 1.20 µs |
8 | 1.50 µs | 1.50 µs | 1.20 µs | 0.90 µs |
7 | 1.50 µs | 1.50 µs | 1.20 µs | 0.90 µs |
6 | 1.50 µs | 1.50 µs | 1.20 µs | 0.90 µs |
5 | 1.50 µs | 1.50 µs | 1.20 µs | 0.90 µs |
4 | 1.20 µs | 1.20 µs | 0.90 µs | 0.90 µs |
3 | 1.20 µs | 1.20 µs | 0.90 µs | 0.90 µs |
2 | 0.90 µs | 0.90 µs | 0.90 µs | 0.90 µs |
1 | 0.90 µs | 0.90 µs | 0.90 µs | 0.90 µs |