The DRV8886AT is a stepper motor driver for industrial and consumer end equipment applications. The device is fully integrated with two N-channel power MOSFET H-bridge drivers, a microstepping indexer, and integrated current sensing. The DRV8886AT is capable of driving up to 2-A full scale or 1.4-A rms output current (24-V and TA = 25°C, dependent on PCB design).
The DRV8886AT uses an internal current sense architecture to eliminate the need for two external power sense resistors saving PCB area and system cost. The DRV8886AT uses an internal PWM current regulation scheme adjustable between smart tune adaptive decay technology, slow, and mixed decay options. Smart tune adaptive decay technology automatically adjusts for optimal current regulation performance and compensates for motor variation and aging effects.
A simple STEP/DIR interface allows an external controller to manage the direction and step rate of the stepper motor. The device can be configured in different step modes ranging from full-step to 1/16 microstepping. A low-power sleep mode is provided for very low standby quiescent standby current using a dedicated nSLEEP pin.
Device protection features are provided for supply undervoltage, charge pump faults, overcurrent, short circuits, and overtemperature. Fault conditions are indicated by the nFAULT pin.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
DRV8886AT | HTSSOP (24) | 7.80 mm × 4.40 mm |
WQFN (28) | 5.50 mm × 3.5 mm |
Changes from B Revision (November 2018) to C Revision
Changes from A Revision (July 2018) to B Revision
Changes from * Revision (January 2017) to A Revision
PIN | TYPE(1) | DESCRIPTION | ||
---|---|---|---|---|
NAME | NO. | |||
HTSSOP | WQFN | |||
AOUT1 | 5 | 3 | O | Winding A output. Connect to stepper motor winding. |
AOUT2 | 7 | 5 | ||
AVDD | 13 | 12 | PWR | Internal regulator. Bypass to GND with a X5R or X7R, 0.47-µF, 6.3-V ceramic capacitor. |
BOUT1 | 10 | 8 | O | Winding B output. Connect to stepper motor winding. |
BOUT2 | 8 | 6 | ||
CPH | 2 | 28 | PWR | Charge pump switching node. Connect a X5R or X7R, 0.022-µF, VM-rated ceramic capacitor from CPH to CPL. |
CPL | 1 | 27 | ||
DECAY | 24 | 25 | I | Decay-mode setting. Sets the decay mode (see the Decay Modes section). Decay mode is latched on device enable. |
DIR | 20 | 21 | I | Direction input. Logic level sets the direction of stepping; internal pulldown resistor. |
DVDD | 14 | 13 | PWR | Internal regulator. Bypass to GND with a X5R or X7R, 0.47-µF, 6.3-V ceramic capacitor. |
ENABLE | 18 | 19 | I | Enable driver input. Logic high to enable device outputs; logic low to disable; internal pulldown resistor. |
GND | 12 | 10 | PWR | Device ground. Connect to system ground. |
M0 | 21 | 22 | I | Microstepping mode-setting. Sets the step mode; tri-level pins; sets the step mode; internal pulldown resistor. |
M1 | 22 | 23 | ||
NC | — | 11 | — | No connect. No internal connection |
14 | ||||
15 | ||||
26 | ||||
PGND | 6 | 4 | PWR | Power ground. Connect to system ground. |
9 | 7 | |||
RREF | 16 | 17 | I | Current-limit analog input. Connect resistor to ground to set full-scale regulation current. |
STEP | 19 | 20 | I | Step input. A rising edge causes the indexer to advance one step; internal pulldown resistor. |
TRQ | 23 | 24 | I | Current-scaling control. Scales the output current; tri-level pin. |
VCP | 3 | 1 | PWR | Charge pump output. Connect a X5R or X7R, 0.22-µF, 16-V ceramic capacitor to VM. |
VM | 4 | 2 | PWR | Power supply. Connect to motor supply voltage and bypass to GND with two 0.01-µF ceramic capacitors (one for each pin) plus a bulk capacitor rated for VM. |
11 | 9 | |||
nFAULT | 15 | 16 | OD | Fault indication. Pulled logic low with fault condition; open-drain output requires an external pullup resistor. |
nSLEEP | 17 | 18 | I | Sleep mode input. Logic high to enable device; logic low to enter low-power sleep mode; internal pulldown resistor. |
MIN | MAX | UNIT | |
---|---|---|---|
Power supply voltage (VM) | –0.3 | 40 | V |
Power supply voltage ramp rate (VM) | 0 | 2 | V/µs |
Charge pump voltage (VCP, CPH) | –0.3 | VM + 7 | V |
Charge pump negative switching pin (CPL) | –0.3 | VM | V |
Internal regulator voltage (DVDD) | –0.3 | 3.8 | V |
Internal regulator current output (DVDD) | 0 | 1 | mA |
Internal regulator voltage (AVDD) | –0.3 | 5.7 | V |
Control pin voltage (STEP, DIR, ENABLE, nFAULT, M0, M1, DECAY, TRQ, nSLEEP) | –0.3 | 5.7 | V |
Open drain output current (nFAULT) | 0 | 10 | mA |
Current limit input pin voltage (RREF) | –0.3 | 6.0 | V |
Continuous phase node pin voltage (AOUT1, AOUT2, BOUT1, BOUT2) | –1.0 | VM + 1.0 | V |
Transient 100 ns phase node pin voltage (AOUT1, AOUT2, BOUT1, BOUT2) | –3.0 | VM + 3.0 | V |
Peak drive current (AOUT1, AOUT2, BOUT1, BOUT2) | 0 | 3 | A |
Operating junction temperature, TJ | –40 | 150 | °C |
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VVM | Power supply voltage (VM) | 8 | 37 | V |
VI | Input voltage (DECAY, DIR, ENABLE, M0, M1, nSLEEP, STEP, TRQ) | 0 | 5.3 | V |
ƒPWM | Applied STEP signal (STEP) | 0 | 100(1) | kHz |
IDVDD | External load current (DVDD) | 0 | 1(2) | mA |
IFS | Motor full-scale current (xOUTx) | 0 | 2(2) | A |
Irms | Motor RMS current (xOUTx) | 0 | 1.4(2) | A |
TA | Operating ambient temperature | –40 | 125 | °C |
THERMAL METRIC(1) | DRV8886 | UNIT | ||
---|---|---|---|---|
PWP (HTSSOP) | RHR (WQFN) | |||
24 PINS | 28 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 33.8 | 33.2 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 18.0 | 23.1 | °C/W |
RθJB | Junction-to-board thermal resistance | 7.7 | 12.2 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.2 | 0.3 | °C/W |
ψJB | Junction-to-board characterization parameter | 7.8 | 12.0 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 1.3 | 3.3 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
POWER SUPPLIES (VM, DVDD, AVDD) | ||||||
VVM | VM operating voltage | 8 | 37 | V | ||
IVM | VM operating supply current | ENABLE = 1, nSLEEP = 1, No motor load | 5 | 8 | mA | |
IVMQ | VM sleep mode supply current | nSLEEP = 0; TA = 25°C | 20 | μA | ||
nSLEEP = 0; TA = 125°C(1) | 40 | |||||
tSLEEP | Sleep time | nSLEEP = 0 to sleep-mode | 50 | 200 | μs | |
tWAKE | Wake-up time | nSLEEP = 1 to output transition | 0.85 | 1.5 | ms | |
tON | Turn-on time | VM > UVLO to output transition | 0.85 | 1.5 | ms | |
VDVDD | Internal regulator voltage | 0- to 1-mA external load | 2.9 | 3.3 | 3.6 | V |
VAVDD | Internal regulator voltage | No external load | 4.5 | 5 | 5.5 | V |
CHARGE PUMP (VCP, CPH, CPL) | ||||||
VVCP | VCP operating voltage | VM + 5.5 | V | |||
LOGIC-LEVEL INPUTS (STEP, DIR, ENABLE, nSLEEP, M1) | ||||||
VIL | Input logic-low voltage | 0 | 0.8 | V | ||
VIH | Input logic-high voltage | 1.6 | 5.3 | V | ||
VHYS | Input logic hysteresis | 200 | mV | |||
IIL | Input logic-low current | VIN = 0 V | –1 | 1 | μA | |
IIH | Input logic-high current | VIN = 5 V | 100 | μA | ||
RPD | Pulldown resistance | To GND | 100 | kΩ | ||
tPD(1) | Propagation delay | STEP to current change | 1.2 | μs | ||
TRI-LEVEL INPUT (M0, TRQ) | ||||||
VIL | Tri-level input logic low voltage | 0 | 0.65 | V | ||
VIZ | Tri-level input Hi-Z voltage | 0.95 | 1.1 | 1.25 | V | |
VIH | Tri-level input logic high voltage | 1.5 | 5.3 | V | ||
IIL | Tri-level input logic low current | VIN = 0 V | –90 | μA | ||
IIH | Tri-level input logic high current | VIN = 5 V | 155 | μA | ||
RPD | Tri-level pulldown resistance | VIN = Hi-Z, to GND | 65 | kΩ | ||
RPU | Tri-level pullup resistance | VIN = Hi-Z, to DVDD | 130 | kΩ | ||
QUAD-LEVEL INPUT (DECAY) | ||||||
VI1 | Quad-level input voltage 1 | Can set with 1% 5 kΩ to GND | 0 | 0.14 | V | |
VI2 | Quad-level input voltage 2 | Can set with 1% 15 kΩ to GND | 0.24 | 0.46 | V | |
VI3 | Quad-level input voltage 3 | Can set with 1% 44.2 kΩ to GND | 0.71 | 1.24 | V | |
VI4 | Quad-level input voltage 4 | Can set with 1% 133 kΩ to GND | 2.12 | 5.3 | V | |
IO | Output current | To GND | 17 | 22 | 27.25 | μA |
CONTROL OUTPUTS (nFAULT) | ||||||
VOL | Output logic-low voltage | IO = 1 mA, RPULLUP = 4.7 kΩ | 0.5 | V | ||
IOH | Output logic-high leakage | VO = 5 V, RPULLUP = 4.7 kΩ | –1 | 1 | μA | |
MOTOR DRIVER OUTPUTS (AOUT1, AOUT2, BOUT1, BOUT2) | ||||||
RDS(ON) | High-side FET on resistance | VM = 24 V, I = 1.4 A, TA = 25°C | 290 | 346 | mΩ | |
RDS(ON) | Low-side FET on resistance | VM = 24 V, I = 1.4 A, TA = 25°C | 260 | 320 | mΩ | |
tRISE(1) | Output rise time | 100 | ns | |||
tFALL(1) | Output fall time | 100 | ns | |||
tDEAD(1) | Output dead time | 200 | ns | |||
Vd(1) | Body diode forward voltage | IOUT = 0.5 A | 0.7 | 1 | V | |
PWM CURRENT CONTROL (RREF) | ||||||
ARREF | RREF transimpedance gain | 28.1 | 30 | 31.9 | kAΩ | |
VRREF | RREF voltage | RREF = 18 to 132 kΩ | 1.18 | 1.232 | 1.28 | V |
tOFF | PWM off-time | 20 | μs | |||
CRREF | Equivalent capacitance on RREF | 10 | pF | |||
tBLANK | PWM blanking time | IRREF = 2.0 A, 63% to 100% current setting | 1.5 | µs | ||
IRREF = 2.0 A, 0% to 63% current setting | 1 | |||||
ΔITRIP | Current trip accuracy | IRREF = 1.5 A, 10% to 20% current setting, 1% reference resistor | –15% | 15% | ||
IRREF = 1.5 A, 20% to 63% current setting, 1% reference resistor | –10% | 10% | ||||
IRREF = 1.5 A, 71% to 100% current setting, 1% reference resistor | –6.25% | 6.25% | ||||
PROTECTION CIRCUITS | ||||||
VUVLO | VM UVLO | VM falling, UVLO report | 7 | 7.8 | V | |
VM rising, UVLO recovery | 7.2 | 8 | ||||
VUVLO,HYS | Undervoltage hysteresis | Rising to falling threshold | 200 | mV | ||
VCPUV | Charge pump undervoltage | VCP falling; CPUV report | VM + 2 | V | ||
IOCP | Overcurrent protection trip level | Current through any FET | 3 | A | ||
tOCP(1) | Overcurrent deglitch time | 1.3 | 1.9 | 2.8 | μs | |
tRETRY | Overcurrent retry time | 1 | 1.6 | ms | ||
TTSD(1) | Thermal shutdown temperature | Die temperature TJ | 150 | °C | ||
THYS(1) | Thermal shutdown hysteresis | Die temperature TJ | 20 | °C |
NO. | MIN | MAX | UNIT | ||
---|---|---|---|---|---|
1 | ƒSTEP(1) | Step frequency | 500 | kHz | |
2 | tWH(STEP) | Pulse duration, STEP high | 970 | ns | |
3 | tWL(STEP) | Pulse duration, STEP low | 970 | ns | |
4 | tSU(DIR, Mx) | Setup time, DIR or USMx to STEP rising | 200 | ns | |
5 | tH(DIR, Mx) | Hold time, DIR or USMx to STEP rising | 200 | ns |
The DRV8886AT device is an integrated motor-driver solution for bipolar stepper motors. The device integrates two N-channel power MOSFET H-bridges, integrated current sense and regulation circuitry, and a microstepping indexer. The DRV8886AT device can be powered with a supply voltage from 8 to 37 V and is capable of providing an output current up to 3-A peak, 2-A full-scale, or 1.4-A root mean square (rms). The actual full-scale and rms current depends on the ambient temperature, supply voltage, and PCB thermal capability.
The DRV8886AT device uses an integrated current-sense architecture which eliminates the need for two external power sense resistors. This architecture removes the power dissipated in the sense resistors by using a current mirror approach and using the internal power MOSFETs for current sensing. The current regulation set point is adjusted with a standard low-power resistor connected to the RREF pin. This features reduces external component cost, board PCB size, and system power consumption.
A simple STEP/DIR interface allows for an external controller to manage the direction and step rate of the stepper motor. The internal indexer can execute high-accuracy microstepping without requiring the external controller to manage the winding current level. The indexer is capable of full step, half step, and 1/4, 1/8, 1/16 microstepping. In addition to a standard half stepping mode, a noncircular half stepping mode is available for increased torque output at higher motor RPM.
The current regulation is configurable between several decay modes. The decay mode can be selected as a slow-mixed, mixed decay, smart tune Ripple Control, or smart tune Dynamic Decay current regulation scheme. The slow-mixed decay mode uses slow decay on increasing steps and mixed decay on decreasing steps. The smart tune decay modes automatically adjust for optimal current regulation performance and compensate for motor variation and aging effects. smart tune Ripple Control uses a variable off-time, ripple control scheme to minimize distortion of the motor winding current. smart tune Dynamic Decay uses a fixed off-time, dynamic decay percentage scheme to minimize distortion of the motor winding current while also minimizing frequency content.
An adaptive blanking time feature automatically scales the minimum drive time with output current level. This feature helps alleviate zero-crossing distortion by limiting the drive time at low-current steps.
A torque DAC feature allows the controller to scale the output current without needing to scale the RREF reference resistor. The torque DAC is accessed using a digital input pin which allows the controller to save system power by decreasing the motor current consumption when high output torque is not required.
A low-power sleep mode is included which allows the system to save power when not actively driving the motor.
Table 1 lists the recommended external components for the DRV8886AT device.
COMPONENT | PIN 1 | PIN 2 | RECOMMENDED |
---|---|---|---|
CVM1 | VM | GND | Two X5R or X7R, 0.01-µF, VM-rated ceramic capacitors |
CVM2 | VM | GND | Bulk, VM-rated capacitor |
CVCP | VCP | VM | X5R or X7R, 0.22-µF, 16-V ceramic capacitor |
CSW | CPH | CPL | X5R or X7R, 0.022-µF, VM-rated ceramic capacitor |
CAVDD | AVDD | GND | X5R or X7R, 0.47-µF, 6.3-V ceramic capacitor |
CDVDD | DVDD | GND | X5R or X7R, 0.47-µF, 6.3-V ceramic capacitor |
RnFAULT | VCC (1) | nFAULT | >4.7-kΩ resistor |
RREF | RREF | GND | Resistor to limit chopping current must be installed. See the Typical Application section for value selection. |
Stepper motor drivers can be classified using three different numbers to describe the output current: peak, rms, and full-scale.