The DRV8886AT is a stepper motor driver for industrial and consumer end equipment applications. The device is fully integrated with two N-channel power MOSFET H-bridge drivers, a microstepping indexer, and integrated current sensing. The DRV8886AT is capable of driving up to 2-A full scale or 1.4-A rms output current (24-V and TA = 25°C, dependent on PCB design).
The DRV8886AT uses an internal current sense architecture to eliminate the need for two external power sense resistors saving PCB area and system cost. The DRV8886AT uses an internal PWM current regulation scheme adjustable between smart tune adaptive decay technology, slow, and mixed decay options. Smart tune adaptive decay technology automatically adjusts for optimal current regulation performance and compensates for motor variation and aging effects.
A simple STEP/DIR interface allows an external controller to manage the direction and step rate of the stepper motor. The device can be configured in different step modes ranging from full-step to 1/16 microstepping. A low-power sleep mode is provided for very low standby quiescent standby current using a dedicated nSLEEP pin.
Device protection features are provided for supply undervoltage, charge pump faults, overcurrent, short circuits, and overtemperature. Fault conditions are indicated by the nFAULT pin.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
DRV8886AT | HTSSOP (24) | 7.80 mm × 4.40 mm |
WQFN (28) | 5.50 mm × 3.5 mm |
Changes from B Revision (November 2018) to C Revision
Changes from A Revision (July 2018) to B Revision
Changes from * Revision (January 2017) to A Revision
PIN | TYPE(1) | DESCRIPTION | ||
---|---|---|---|---|
NAME | NO. | |||
HTSSOP | WQFN | |||
AOUT1 | 5 | 3 | O | Winding A output. Connect to stepper motor winding. |
AOUT2 | 7 | 5 | ||
AVDD | 13 | 12 | PWR | Internal regulator. Bypass to GND with a X5R or X7R, 0.47-µF, 6.3-V ceramic capacitor. |
BOUT1 | 10 | 8 | O | Winding B output. Connect to stepper motor winding. |
BOUT2 | 8 | 6 | ||
CPH | 2 | 28 | PWR | Charge pump switching node. Connect a X5R or X7R, 0.022-µF, VM-rated ceramic capacitor from CPH to CPL. |
CPL | 1 | 27 | ||
DECAY | 24 | 25 | I | Decay-mode setting. Sets the decay mode (see the Decay Modes section). Decay mode is latched on device enable. |
DIR | 20 | 21 | I | Direction input. Logic level sets the direction of stepping; internal pulldown resistor. |
DVDD | 14 | 13 | PWR | Internal regulator. Bypass to GND with a X5R or X7R, 0.47-µF, 6.3-V ceramic capacitor. |
ENABLE | 18 | 19 | I | Enable driver input. Logic high to enable device outputs; logic low to disable; internal pulldown resistor. |
GND | 12 | 10 | PWR | Device ground. Connect to system ground. |
M0 | 21 | 22 | I | Microstepping mode-setting. Sets the step mode; tri-level pins; sets the step mode; internal pulldown resistor. |
M1 | 22 | 23 | ||
NC | — | 11 | — | No connect. No internal connection |
14 | ||||
15 | ||||
26 | ||||
PGND | 6 | 4 | PWR | Power ground. Connect to system ground. |
9 | 7 | |||
RREF | 16 | 17 | I | Current-limit analog input. Connect resistor to ground to set full-scale regulation current. |
STEP | 19 | 20 | I | Step input. A rising edge causes the indexer to advance one step; internal pulldown resistor. |
TRQ | 23 | 24 | I | Current-scaling control. Scales the output current; tri-level pin. |
VCP | 3 | 1 | PWR | Charge pump output. Connect a X5R or X7R, 0.22-µF, 16-V ceramic capacitor to VM. |
VM | 4 | 2 | PWR | Power supply. Connect to motor supply voltage and bypass to GND with two 0.01-µF ceramic capacitors (one for each pin) plus a bulk capacitor rated for VM. |
11 | 9 | |||
nFAULT | 15 | 16 | OD | Fault indication. Pulled logic low with fault condition; open-drain output requires an external pullup resistor. |
nSLEEP | 17 | 18 | I | Sleep mode input. Logic high to enable device; logic low to enter low-power sleep mode; internal pulldown resistor. |