SLVSEE9D April 2020 – April 2021 DRV8889-Q1
PRODUCTION DATA
The device state is managed by the nSLEEP pin. When the nSLEEP pin is low, the device enters a low-power sleep mode. In sleep mode, all the internal MOSFETs are disabled, the DVDD regulator is disabled, the charge pump is disabled, and the SPI is disabled. The tSLEEP time must elapse after a falling edge on the nSLEEP pin before the device enters sleep mode. The device is brought out of sleep automatically if the nSLEEP pin is brought high. The tWAKE time must elapse before the device is ready for inputs.