SLVSEE9D April 2020 – April 2021 DRV8889-Q1
PRODUCTION DATA
If at any time the voltage on the VCP pin falls below the CPUV voltage, all the outputs are disabled, and the nFAULT pin is driven low. The charge pump remains active during this condition. The FAULT and CPUV bits are made high in the SPI registers. Normal operation resumes (motor-driver operation starts, nFAULT released and FAULT bit is made low) when the VCP undervoltage condition is removed. The CPUV bit remains set until it is cleared through the CLR_FLT bit or an nSLEEP reset pulse.