SLVSEC9C September 2019 – February 2020 DRV8904-Q1 , DRV8906-Q1 , DRV8908-Q1 , DRV8910-Q1 , DRV8912-Q1
PRODUCTION DATA.
In passive OLD, the detection of open load is carried before the driver is turned on. The state of all FETs remains in Hi-Z state, while a minimal amount of current flows through motor for short amount of time to test the motor connection. The diagnostic current is very small to avoid causing the motor rotation.
Figure 66, Figure 67, and Figure 68 show the circuit implementations of passive OLD. As shown in these figures, a constant current source pulls the OUT1 pin to the AVDD (internal fixed voltage) which allows current flow from OUT1 to OUT2 terminal. The current drawn is completely dependent on the motor resistance between OUT1 and OUT2 and limited by the internal current sourcing (IOL_PU) and sinking (IOL_PD) capability of the passive OLD circuitry. Depending on this current and the comparator threshold voltage (VOL_HS and VOL_LS), the comparator output OL1_HS and OL2_LS are either set or reset which determines the open-load status. When an open load is detected, the OLD bit in the IC status (IC_STAT) register is set, the HBX_LS_OLD bit in the open-load status register (OLD_STAT_X) is set and nFAULT pin is driven low. The OLD bit remains set until cleared through the CLR_FLT bit. This implementation is applicable for half-bridge driving as shown in Figure 67, and Figure 68.
NOTE
Passive OLD sequence is not disabled by the HBX_OLD_DIS bits.
Following are the steps to configure and detect the passive OLD in the DRV89XX-Q1 device.
During normal driving, HBX_HS_EN and HBX_LS_EN bits control the state of OUTX. However, when POLD_EN and HBX_POLD_EN are 1, the OUTX channel is disabled, and HBX_HS_EN and HBX_LS_EN control SWX_HS and SWX_LS used for passive OLD (see schematic representation in Figure 66). Table 9 shows the truth table for this operation.
HBX_POLD_EN | HBX_HS_EN | HBX_LS_EN | OUTX | SWX_HS | SWX_LS | OPEN LOAD SEQUENCE |
---|---|---|---|---|---|---|
0 | X | X | Follows HBX_HS_EN and HBX_LS_EN | Open | Open | Passive OLD for the channel is disabled and HBX_HS_EN/HBX_LS_EN set output OUTx state |
1 | 0 | 0 | Z | Open | Open | Off state - no passive OLD |
1 | 0 | 1 | Z | Open | Closed | Valid passive OLD for VM-connected load |
1 | 1 | 0 | Z | Closed | Open | Valid passive OLD for GND-connected load |
1 | 1 | 1 | Z | Open | Open | Invalid state |
NOTE
The OLD_REP bit works in a similar way as for the active OLD. The OLD_OP bit is not applicable for passive OLD operation since the outputs are already disabled.
NOTE
Passive OLD sequence is not enabled if any other fault (other than OCP/OLD) is present.
Table 10 shows an example for configuring passive OLD for various loads. The HBX_VM_POLD bits can be enabled for any loads that connect directly to VM. In cases where VM is low, the passive OLD current may need to be larger so passive OLD does not falsely indicate an open load. Setting HBX_VM_POLD = 1 chooses a smaller ROL so more current flows and the device can properly detect an open load.
CONNECTION | HB1_VM_POLD | HB2_VM_POLD | HB1_HS_EN | HB1_LS_EN | HB2_HS_EN | HB2_LS_EN | OPEN-LOAD
DETECTION |
---|---|---|---|---|---|---|---|
Full-Bridge Operation (Motor Connected Between OUT1 and OUT2) | 0 | 0 | 1 | 0 | 0 | 1 | Detection based on resistance threshold (Forward Connection) |
0 | 0 | 0 | 1 | 1 | 0 | Detection based on resistance threshold (Reverse Connection) | |
0 | 0 | 1 | 0 | 1 | 0 | Invalid case (both high-side OLD circuitry operating) | |
0 | 0 | 0 | 1 | 0 | 1 | Invalid case (both low-side OLD circuitry operating) | |
Half-Bridge Operation (Load Connected Between OUT1/2 and VM) | 1 | X | 0 | 1 | 0 | 0 | Detection only for OUT1 channel based on resistance threshold |
X | 1 | 0 | 0 | 0 | 1 | Detection only for OUT2 channel based on resistance threshold | |
1 | 1 | 0 | 1 | 0 | 1 | Detection for both outputs based on resistance threshold | |
X | X | 1 | 0 | 0 | 0 | Invalid case (OUT1 high-side OLD circuitry is operating for VM connected load) | |
X | X | 0 | 0 | 1 | 0 | Invalid case (OUT2 high-side OLD circuitry is operating for VM connected load) | |
X | X | 1 | 0 | 1 | 0 | Invalid case (both high-side OLD circuitry is operating for VM connected load) | |
Half-Bridge Operation (Load Connected Between OUT1/2 and GND) | 0 | 0 | 1 | 0 | 0 | 0 | Detection only for OUT1 channel based on resistance threshold |
0 | 0 | 0 | 0 | 1 | 0 | Detection only for OUT2 channel based on resistance threshold | |
0 | 0 | 1 | 0 | 1 | 0 | Detection for both outputs based on resistance threshold | |
0 | 0 | 0 | 1 | 0 | 0 | Invalid case (OUT1 low-side OLD circuitry is operating for GND connected load) | |
0 | 0 | 0 | 0 | 0 | 1 | Invalid case (OUT2 low-side OLD circuitry is operating for GND connected load) | |
0 | 0 | 0 | 1 | 0 | 1 | Invalid case (both low-side OLD circuitry is operating for GND connected load) |