SLOSE62A January   2021  – May 2022 DRV8935

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Bridge Control and Current Regulation
      2. 7.3.2 Decay Modes
        1. 7.3.2.1 Blanking time
      3. 7.3.3 Charge Pump
      4. 7.3.4 Linear Voltage Regulators
      5. 7.3.5 Logic and Quad-Level Pin Diagrams
      6. 7.3.6 nFAULT Pin
      7. 7.3.7 Protection Circuits
        1. 7.3.7.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.7.2 VCP Undervoltage Lockout (CPUV)
        3. 7.3.7.3 Overcurrent Protection (OCP)
        4. 7.3.7.4 Thermal Shutdown (OTSD)
        5. 7.3.7.5 Fault Condition Summary
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode (nSLEEP = 0)
      2. 7.4.2 Operating Mode (nSLEEP = 1)
      3. 7.4.3 nSLEEP Reset Pulse
      4. 7.4.4 Functional Modes Summary
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Regulation
      3. 8.2.3 Power Dissipation Calculation and Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Typical values are at TA = 25°C and VVM = 24 V. All limits are over recommended operating conditions, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES (VM, DVDD)
IVM VM operating supply current nSLEEP = 1, No load 5 6.5 mA
IVMQ VM sleep mode supply current nSLEEP = 0 2 4 μA
tSLEEP Sleep time nSLEEP = 0 to sleep-mode 120 μs
tRESET nSLEEP reset pulse nSLEEP low to clear fault 20 40 μs
tWAKE Wake-up time nSLEEP = 1 to output transition 0.8 1.2 ms
tON Turn-on time VM > UVLO to output transition 0.8 1.2 ms
VDVDD Internal regulator voltage No external load, 6 V < VVM < 33 V 4.75 5 5.25 V
No external load, VVM = 4.5 V

4.2

4.35

V
CHARGE PUMP (VCP, CPH, CPL)
VVCP VCP operating voltage 6 V < VVM < 33 V VVM + 5 V
f(VCP) Charge pump switching frequency VVM > UVLO; nSLEEP = 1 360 kHz
LOGIC-LEVEL INPUTS (IN1, IN2, IN3, IN4, nSLEEP)
VIL Input logic-low voltage 0 0.6 V
VIH Input logic-high voltage 1.5 5.5 V
VHYS Input logic hysteresis 150 mV
IIL Input logic-low current VIN = 0 V –1 1 μA
IIH Input logic-high current VIN = 5 V 100 μA
QUAD-LEVEL INPUTS (TOFF)
VI1 Input logic-low voltage Tied to GND 0 0.6 V
VI2 330kΩ ± 5% to GND 1 1.25 1.4 V
VI3 Input Hi-Z voltage Hi-Z (>500kΩ to GND) 1.8 2 2.2 V
VI4 Input logic-high voltage Tied to DVDD 2.7 5.5 V
IO Output pull-up current 10 μA
CONTROL OUTPUTS (nFAULT)
VOL Output logic-low voltage IO = 5 mA 0.5 V
IOH Output logic-high leakage –1 1 μA
MOTOR DRIVER OUTPUTS (OUT1, OUT2, OUT3, OUT4)
RDS(ONH) High-side FET on resistance TJ = 25 °C, IO = -1 A 165 200 mΩ
TJ = 125 °C, IO = -1 A 250 300 mΩ
TJ = 150 °C, IO = -1 A 280 350 mΩ
RDS(ONL) Low-side FET on resistance TJ = 25 °C, IO = 1 A 165 200 mΩ
TJ = 125 °C, IO = 1 A 250 300 mΩ
TJ = 150 °C, IO = 1 A 280 350 mΩ
CURRENT REGULATION (VREF)
KV Transimpedance gain VREF = 3.3V 1.254 1.32 1.386 V/A
IVREF VREF Leakage Current VREF = 3.3V 8.25 μA
tOFF PWM off-time TOFF = 0 7 μs
TOFF = 1 16
TOFF = Hi-Z 24
TOFF = 330 kΩ to GND 32

ΔITRIP

Current trip accuracy

IO = 2.5 A, 10% to 20% current setting

-8

12

%

IO = 2.5 A, 20% to 40% current setting

-7

7

IO = 2.5 A, 40% to 100% current setting

-5

5
PROTECTION CIRCUITS
VUVLO VM UVLO lockout VM falling, UVLO falling 4.1 4.25 4.35 V
VM rising, UVLO rising 4.2 4.35 4.45
VUVLO,HYS Undervoltage hysteresis Rising to falling threshold 100 mV
VCPUV Charge pump undervoltage VCP falling VVM + 2 V
IOCP Overcurrent protection Current through any FET 4 A
tOCP Overcurrent deglitch time 1.8 μs
TOTSD Thermal shutdown Die temperature TJ 150 165 180 °C
THYS_OTSD Thermal shutdown hysteresis Die temperature TJ 20 °C