SLOSE83A March 2023 – January 2025 DRV8952
PRODUCTION DATA
The estimated junction temperature will be: TJ = TA + (PTOT x θJA)
The junction-to-ambient thermal resistance θJA is 22.5 °C/W for the DDW package and 24.5 °C/W for the PWP package on a JEDEC standard PCB.
Therfore, the first estimate of the junction temperature for the DDW package is -
TJ = TA + (PTOT x θJA) = 25 + (3.062 x 22.5) = 93.9°C
The first estimate of the junction temperature for the PWP package is -
TJ = TA + (PTOT x θJA) = 25 + (3.062 x 24.5) = 100 °C
For more accurate calculation, consider the dependency of on-resistance of FETs with device junction temperature shown in the Typical Operating Characteristics section.