SLOSE83A March   2023  – January 2025 DRV8952

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Feature Description
    4. 6.4  Independent Half-bridge Operation
    5. 6.5  Current Sensing and Regulation
      1. 6.5.1 Current Sensing and Feedback
      2. 6.5.2 Current Sensing with External Resistor
      3. 6.5.3 Current Regulation
    6. 6.6  Charge Pump
    7. 6.7  Linear Voltage Regulator
    8. 6.8  VCC Voltage Supply
    9. 6.9  Logic Level Pin Diagram
    10. 6.10 Protection Circuits
      1. 6.10.1 VM Undervoltage Lockout (UVLO)
      2. 6.10.2 VCP Undervoltage Lockout (CPUV)
      3. 6.10.3 Logic Supply Power on Reset (POR)
      4. 6.10.4 Overcurrent Protection (OCP)
      5. 6.10.5 Thermal Shutdown (OTSD)
      6. 6.10.6 nFAULT Output
      7. 6.10.7 Fault Condition Summary
    11. 6.11 Device Functional Modes
      1. 6.11.1 Sleep Mode (nSLEEP = 0)
      2. 6.11.2 Operating Mode
      3. 6.11.3 nSLEEP Reset Pulse
      4. 6.11.4 Functional Modes Summary
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving Solenoid Loads
        1. 7.1.1.1 Solenoid Driver Typical Application
        2. 7.1.1.2 Thermal Calculations
          1. 7.1.1.2.1 Power Loss Calculations
          2. 7.1.1.2.2 Junction Temperature Estimation
        3. 7.1.1.3 Application Performance Plots
      2. 7.1.2 Driving Stepper Motors
        1. 7.1.2.1 Stepper Driver Typical Application
        2. 7.1.2.2 Power Loss Calculations
        3. 7.1.2.3 Junction Temperature Estimation
      3. 7.1.3 Driving Brushed-DC Motors
        1. 7.1.3.1 Brushed-DC Driver Typical Application
        2. 7.1.3.2 Power Loss Calculation
        3. 7.1.3.3 Junction Temperature Estimation
        4. 7.1.3.4 Driving Single Brushed-DC Motor
      4. 7.1.4 Driving Thermoelectric Coolers (TEC)
      5. 7.1.5 Driving Brushless DC Motors
    2. 7.2 Power Supply Recommendations
      1. 7.2.1 Bulk Capacitance
      2. 7.2.2 Power Supplies
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 PCB Material Recommendation
      3. 7.3.3 Thermal Considerations
  9. Package Thermal Considerations
    1. 8.1 DDW Package
      1. 8.1.1 Thermal Performance
        1. 8.1.1.1 Steady-State Thermal Performance
        2. 8.1.1.2 Transient Thermal Performance
  10. Device and Documentation Support
    1. 9.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Fault Condition Summary

Table 6-4 Fault Condition Summary
FAULTCONDITIONERROR REPORTH-BRIDGECHARGE PUMPLOGICRECOVERY
VM undervoltage (UVLO)VM < VUVLOnFAULTDisabledDisabledResetVM > VUVLO
VCP undervoltage (CPUV)VCP < VCPUVnFAULTDisabledOperatingOperatingVCP > VCPUV
Logic Supply PORVCC < VCCUVLO

-

Disabled

Disabled

Reset

VCC > VCCUVLO
Overcurrent (OCP)IOUT > IOCP

, OCPM = 0 (DDW Package)

nFAULTDisabledOperatingOperatingLatched:

nSLEEP reset pulse

IOUT > IOCP

, OCPM = 1 (DDW Package)

nFAULT

Disabled

Operating

Operating

Automatic retry: tRETRY
IOUT > IOCP

, PWP Package

nFAULTDisabledOperatingOperatingLatched:

nSLEEP reset pulse

Thermal Shutdown (OTSD)TJ > TTSD, OCPM = 0

(DDW Package)

nFAULTDisabledDisabledOperatingLatched:

nSLEEP reset pulse

TJ > TTSD, OCPM = 1

(DDW Package)

nFAULT

DisabledDisabledOperatingAutomatic: TJ < TOTSD - THYS_OTSD
TJ > TTSD,

PWP Package

nFAULTDisabledDisabledOperatingAutomatic: TJ < TOTSD - THYS_OTSD