SLOSE83 March   2023 DRV8952

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1  Overview
    2. 7.2  Functional Block Diagram
    3. 7.3  Feature Description
    4. 7.4  Independent Half-bridge Operation
    5. 7.5  Current Sensing and Regulation
      1. 7.5.1 Current Sensing and Feedback
      2. 7.5.2 Current Sensing with External Resistor
      3. 7.5.3 Current Regulation
    6. 7.6  Charge Pump
    7. 7.7  Linear Voltage Regulator
    8. 7.8  VCC Voltage Supply
    9. 7.9  Logic Level Pin Diagram
    10. 7.10 Protection Circuits
      1. 7.10.1 VM Undervoltage Lockout (UVLO)
      2. 7.10.2 VCP Undervoltage Lockout (CPUV)
      3. 7.10.3 Logic Supply Power on Reset (POR)
      4. 7.10.4 Overcurrent Protection (OCP)
      5. 7.10.5 Thermal Shutdown (OTSD)
      6. 7.10.6 nFAULT Output
      7. 7.10.7 Fault Condition Summary
    11. 7.11 Device Functional Modes
      1. 7.11.1 Sleep Mode (nSLEEP = 0)
      2. 7.11.2 Operating Mode
      3. 7.11.3 nSLEEP Reset Pulse
      4. 7.11.4 Functional Modes Summary
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Driving Solenoid Loads
        1. 8.1.1.1 Solenoid Driver Typical Application
        2. 8.1.1.2 Thermal Calculations
          1. 8.1.1.2.1 Power Loss Calculations
          2. 8.1.1.2.2 Junction Temperature Estimation
        3. 8.1.1.3 Application Performance Plots
      2. 8.1.2 Driving Stepper Motors
        1. 8.1.2.1 Stepper Driver Typical Application
        2. 8.1.2.2 Power Loss Calculations
        3. 8.1.2.3 Junction Temperature Estimation
      3. 8.1.3 Driving Brushed-DC Motors
        1. 8.1.3.1 Brushed-DC Driver Typical Application
        2. 8.1.3.2 Power Loss Calculation
        3. 8.1.3.3 Junction Temperature Estimation
        4. 8.1.3.4 Driving Single Brushed-DC Motor
      4. 8.1.4 Driving Thermoelectric Coolers (TEC)
      5. 8.1.5 Driving Brushless DC Motors
  9. 9 Package Thermal Considerations
    1. 9.1 DDW Package
      1. 9.1.1 Thermal Performance
        1. 9.1.1.1 Steady-State Thermal Performance
        2. 9.1.1.2 Transient Thermal Performance
  10. 10Power Supply Recommendations
    1. 10.1 Bulk Capacitance
    2. 10.2 Power Supplies
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 PCB Material Recommendation
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.5 Driving Brushless DC Motors

The DRV8952 can also be used to drive a three-phase brushless DC (BLDC) motor. The DRV8952 supports independent control of three phases required to drive the BLDC motor. One of the four half-bridges of the DRV8952 can be disabled while driving a BLDC motor, by connecting the corresponding EN pin to ground. Figure 8-10 shows a schematic of the DRV8952 driving a BLDC motor.

Figure 8-10 Driving BLDC Motor with DRV8952

The three half-bridges required to drive a BLDC motor can be controlled by six inputs - EN1, EN2, EN3 and IN1, IN2, IN3.

  • When EN1 is low, OUT1 becomes high-impedance, allowing current to flow through the internal body diodes of the high-side and low-side FETs.

  • When EN1 is high and IN1 is low, OUT1 is driven low with its low-side FET enabled.

  • When EN1 is high and IN1 is high, OUT1 is driven high with its high-side FET enabled.

  • Likewise is true for OUT2 and OUT3.

  • EN4 can be grounded to permanently disable OUT4.

A minimum of 30 nH to 100 nH inductance or a ferrite bead has to be connected after the output pins. This will help to prevent any shoot through due to mismatch between channels (for example, process variation, unsymmetrical PCB layout, etc).

The IPROPI pins of the DDW package output a current proportional to the current flowing through the high-side FET of each half-bridge. The IPROPI output accuracy at maximum rated current is 5%.

IPROPI = IHS x AIPROPI

Each IPROPI pin should be connected to an external resistor (RIPROPI) to ground in order to generate a proportional voltage (VIPROPI) on the IPROPI pin. This allows for the load current to be measured as the voltage drop across the RIPROPI resistor with a standard analog to digital converter (ADC).

VIPROPI = IPROPI x RIPROPI

If higher accuracy of current sensing is required or for the PWP package, external sense resistors can be placed between the PGND pins and system ground. The voltage drop across the external sense resistor should not exceed 300 mV.