SNLS426F
August 2012 – November 2018
DS125BR800
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application
4
Revision History
5
Description (cont.)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Electrical Characteristics: Serial Management Bus Interface
7.7
Timing Requirements
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
4-Level Input Configuration Guidelines
8.3.2
PCIe Signal Integrity
8.3.2.1
RX-Detect in SAS/SATA (up to 6 Gbps) Applications
8.3.2.1.1
Signal Detect Control for Datarates above 8 Gbps
8.3.2.2
MODE Operation with SMBus Registers
8.4
Device Functional Modes
8.4.1
Pin Control Mode
8.4.2
SMBus Mode
8.5
Programming
8.5.1
SMBus Master Mode
8.5.2
Transfer of Data Via the SMBus
8.5.3
System Management Bus (SMBus) and Configuration Registers
8.5.4
SMBus Transactions
8.5.5
Writing a Register
8.5.6
Reading a Register
8.6
Register Maps
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
3.3-V or 2.5-V Supply Mode Operation
10.2
Power Supply Bypassing
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
NJY|54
MPQS027A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snls426f_oa
snls426f_pm
2
Applications
SAS/SATA (up to 6 Gbps), Fibre Channel (up to 10GFC)
PCIe Gen-3/2/1, 10G-KR, 10GbE, XAUI, RXAUI