8.1.1 Signal Integrity in 40G-CR4/KR4/SAS/SATA/PCIe Applications

In 40G-CR4/KR4/SAS/SATA/PCIe applications, specifications require Rx-Tx link training to establish and optimize signal conditioning settings for data rates up to 12.5 Gbps. In link training, the Rx partner requests a series of FIR coefficients from the Tx partner at speed. This polling sequence is designed to pre-condition the signal path with an optimized link between the endpoints. Link training occurs at the following data-rates:

The DS125BR820 works to extend the reach possible by using active linear equalization to the channel, boosting attenuated signals so that they can be more easily recovered at the Rx. The repeater outputs are specially designed to be transparent to Tx FIR signaling in order to pass information critical for optimal link training to the Rx. Suggested settings for the A-channels and B-channels are given in Table 11 and Table 12. Further adjustments to EQx and VODx settings may optimize signal margin on the link for different system applications:

The SMBus Slave Mode code example in Table 13 may be used to program the DS125BR820 with the recommended device settings.

8.1.2 Signal Integrity in 40G-SR4/LR4 Applications

In 40G-SR4/LR4 applications, the ideal device settings must be tuned. In particular, EQ and VOD settings must be optimized in order to aid the link partners in meeting the nPPI eye mask test. While tuning the DS125BR820 contributes to signal quality improvement, it is equally important to ensure that the link partner ASIC Tx FIR signal characteristics are optimized as well to facilitate error-free data transmission. Suggested settings for the A-channels and B-channels in a 40G-SR4/LR4 environment can be referenced in Table 11 and Table 12.

8.1.3 Rx Detect Functionality in 40G-CR4/KR4/SAS/SATA Applications

Unlike PCIe systems, 40G-CR4/KR4/SAS/SATA systems use a low speed communications sequence to detect and communicate device capabilities between host ASIC and link partners. This communication eliminates the need to detect for endpoints like in a PCIe application. For 40G-CR4/KR4/SAS/SATA systems, it is recommended to tie the RXDET pin high. This ensures any link-training sequences sent by the host ASIC can reach the link partner receiver without any additional latency due to termination detection sequences.

8.2.1 Generic High Speed Repeater

The DS125BR820 extends PCB and cable reach in multiple applications by using active linear equalization. The high linearity of this device aids specifically in protocols requiring link training and can be used in line cards, backplanes, motherboards, and active cable assemblies, thereby improving margin and overall eye performance. The capability of the repeater can be explored across a range of data rates and ASIC-to-link-partner signaling, as shown in the following two test setup connections.

Figure 9. Test Setup Connections Diagram

Figure 10. Test Setup Connections Diagram

8.2.1.3 Application Performance Plots

No Repeater Used
TJ (1.0E-12) = 21.6 ps

Figure 11. TL = 5 Inch 5–Mil FR4 Trace,
No Repeater, 8 Gbps

No Repeater Used
TJ (1.0E-12) = 43.7 ps

Figure 13. TL = 10 Inch 5–Mil FR4 Trace,
No Repeater, 8 Gbps

No Repeater Used
TJ (1.0E-12) = Not Available Due to Closed Eye

Figure 15. TL = 20 Inch 5–Mil FR4 Trace,
No Repeater, 8 Gbps

No Repeater
TJ (1.0E-12) = Not Available Due to Closed Eye

Figure 17. TL = 5-Meter 30-AWG 100 Ω Twin-Axial Cable,
No Repeater, 8 Gbps

A. No Repeater Used
TJ (1.0E-12) = 24.3 ps

Figure 19. TL = 5 Inch 5–Mil FR4 Trace,
No Repeater, 10.3125 Gbps

A. No Repeater Used
TJ (1.0E-12) = 50.6 ps

Figure 21. TL = 10 Inch 5–Mil FR4 Trace,
No Repeater, 10.3125 Gbps

A. No Repeater Used
TJ (1.0E-12) = Not Available Due to Closed Eye

Figure 23. TL = 20 Inch 5–Mil FR4 Trace,
No Repeater, 10.3125 Gbps

A. No Repeater
TJ (1.0E-12) = 26.1 ps

Figure 25. TL = 5 Inch 5–Mil FR4 Trace,
No Repeater, 12 Gbps

A. No Repeater
TJ (1.0E-12) = 56.6 ps

Figure 27. TL = 10 Inch 5–Mil FR4 Trace,
No Repeater, 12 Gbps

No Repeater Used
TJ (1.0E-12) = Not Available Due to Closed Eye

Figure 29. TL1 = 15 Inch 5–Mil FR4 Trace,
TL2 = 10 Inch 5–Mil FR4 Trace,
No Repeater, 8 Gbps

A. No Repeater Used
TJ (1.0E-12) = Not Available Due to Closed Eye

Figure 31. TL1 = 15 Inch 5–Mil FR4 Trace,
TL2 = 10 Inch 5–Mil FR4 Trace,
No Repeater, 10.3125 Gbps

DS125BR820 Settings: EQA = Level 2, VODA = Level 6
TJ (1.0E-12) = 13.6 ps

Figure 12. TL = 5 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 8 Gbps

DS125BR820 Settings: EQA = Level 3, VODA = Level 6
TJ (1.0E-12) = 18.1 ps

Figure 14. TL= 10 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 8 Gbps

DS125BR820 Settings: EQA = Level 4, VODA = Level 6
TJ (1.0E-12) = 35.5 ps

Figure 16. TL = 20 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 8 Gbps

DS125BR820 Settings: EQA = Level 4, VODA = Level 6
TJ (1.0E-12) = 41.4 ps

Figure 18. TL = 5-Meter 30-AWG 100 Ω Twin-Axial Cable,
DS125BR820 CHA_0, 8 Gbps

A. DS125BR820 Settings: EQA = Level 2, VODA = Level 6
TJ (1.0E-12) = 14.0 ps

Figure 20. TL = 5 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 10.3125 Gbps

A. DS125BR820 Settings: EQA = Level 3, VODA = Level 6
TJ (1.0E-12) = 18.7 ps

Figure 22. TL= 10 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 10.3125 Gbps

A. DS125BR820 Settings: EQA = Level 4, VODA = Level 6
TJ (1.0E-12) = 49.1 ps

Figure 24. TL = 20 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 10.3125 Gbps

A. DS125BR820 Settings: EQA = Level 2, VODA = Level 6
TJ (1.0E-12) = 13.1 ps

Figure 26. TL = 5 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 12 Gbps

A. DS125BR820 Settings: EQA = Level 3, VODA = Level 6
TJ (1.0E-12) = 20.1 ps

Figure 28. TL = 10 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 12 Gbps

DS125BR820 Settings: EQA = Level 4, VODA = Level 6
TJ (1.0E-12) = 33.0 ps

Figure 30. TL1 = 15 Inch 5–Mil FR4 Trace,
TL2 = 10 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 8 Gbps

A. DS125BR820 Settings: EQA = Level 4, VODA = Level 6
TJ (1.0E-12) = 47.9 ps

Figure 32. TL1 = 15 Inch 5–Mil FR4 Trace,
TL2 = 10 Inch 5–Mil FR4 Trace,
DS125BR820 CHA_0, 10.3125 Gbps

8.2.2 Front Port Applications (40G-CR4/SR4/LR4)

The DS125BR820 can be used in front port applications to extend the reach between the host ASIC and the front-port cage. Front port applications typically include 40G-CR4/SR4/LR4. For 40GbE front port optical protocols like 40G-SR4/LR4, the DS125BR820 is designed to support the front-port eye mask and jitter requirements of applicable standards like nPPI. For 40GbE front port copper protocols like 40G-CR4, the DS125BR820 is designed to provide channel equalization in a transparent fashion so as not to inhibit IEEE802.3ba Clause 72 link training. In all of these front port cases, the DS125BR820 can also be used to support eye mask and jitter requirements for SFF-8431 if the 40GbE QSFP+ port is intended to support 4x10G SFP+ applications as well. Below is a typical example of the DS125BR820 used in a front port line-card application.

Figure 33. Typical Front-Port System Configuration

8.2.2.2 Detailed Design Procedure

In front port applications, it is important to ensure that the placement of the DS125BR820 corresponds with the direction of the data flow, since the device is unidirectional. For egress applications, the DS125BR820 should be placed close to the connector cage, and for ingress applications, the DS125BR820 should be placed closer to the switch ASIC. Once the DS125BR820 placement is decided on the signal path, the repeater must be tuned. To tune the repeater, the settings mentioned in Table 11 (for Pin Mode) and Table 12 (for SMBus Modes) are recommended as a default starting point for most applications. Once these settings are configured, additional tuning of the EQ and, to a lesser extent, VOD may be required to optimize the repeater performance in order to meet the link training requirements for 40G-CR4 and eye mask requirements for 40G-SR4/LR4.

An example of a test configuration used to evaluate the DS125BR820 in this application can be seen in Figure 34. For more information about DS125BR820 front port applications, please refer to application note SNLA226:

Figure 34. 10 GbE Transmitter with DS125BR820 QSFP+ Test Board

8.2.2.3 Application Performance Plots

A. DS125BR820 Settings: EQA = Level 2, VODA = Level 6

Figure 35. nPPI Eye Mask Performance with 5 Inch 4-Mil FR4 Input Trace, Test Pattern = PRBS-9, 10.3125 Gbps

A. DS125BR820 Settings: EQA = Level 3, VODA = Level 6

Figure 37. nPPI Eye Mask Performance with 15 Inch 5-Mil FR4 Input Trace, Test Pattern = PRBS-9, 10.3125 Gbps

A. DS125BR820 Settings: EQA = Level 2, VODA = Level 6

Figure 36. nPPI Jitter Performance with 5 Inch 4-Mil FR4 Input Trace, Test Pattern = PRBS-9, 10.3125 Gbps

A. DS125BR820 Settings: EQA = Level 3, VODA = Level 6

Figure 38. nPPI Jitter Performance with 15 Inch 5-Mil FR4 Input Trace, Test Pattern = PRBS-9, 10.3125 Gbps

8.2.3 PCIe Board Applications (PCIe Gen-3)

The DS125BR820 can be used to extend trace length on motherboards and line cards in PCIe Gen-3 applications. The high linearity of the DS125BR820 aids in the link training protocol required by PCIe Gen-3 at 8 Gbps in accordance with PCI-SIG standards. For PCIe Gen-3, preservation of the pre-cursor and post-cursor Tx FIR presets (P1-P10) is crucial to successful signal transmission from motherboard system root complex to line card ASIC or Embedded Processor. Below is a typical example of the DS125BR820 used in a PCIe application:

Figure 39. Typical PCIe Gen-3 Configuration Diagram

8.2.3.2 Design Procedure

In PCIe Gen-3 applications, there is a large range of flexibility regarding the placement of the DS125BR820 in the signal path due to the high linearity of the device. If the PCIe slot must also support lower speeds like PCIe Gen-1 (2.5 Gbps) and Gen-2 (5.0 Gbps), it is recommended to place the DS125BR820 closer to the endpoint Rx. Once the DS125BR820 is placed on the signal path, the repeater must be tuned. To tune the repeater, the settings mentioned in Table 11 (for Pin Mode) and Table 12 (for SMBus Modes) are recommended as a default starting point for most applications. Once these settings are configured, additional tuning of the EQ and, to a lesser extent, VOD may be required to optimize the repeater performance to pass link training preset requirements for PCIe Gen-3.

An example of a test configuration used to evaluate the DS125BR820 in this application can be seen in Figure 40. For more information about DS125BR820 PCIe applications, please refer to application note SNLA227:

Figure 40. Typical PCIe Gen-3 Add-In Card Test Diagram

8.2.3.3 Application Performance Plots

A. No Repeater Used
Composite Eye Height: 50.39 mV
Minimum Eye Width: 49.87 ps
Overall SigTest Result: Fail

Figure 41. PCIe Gen-3, Preset 7, Transition Eye
TL1 = 10 Inch 4-Mil FR4 Trace, No TL2
No Repeater, 8 Gbps

A. No Repeater Used
Composite Eye Height: 50.39 mV
Minimum Eye Width: 49.87 ps
Overall SigTest Result: Fail

Figure 43. PCIe Gen-3, Preset 7, Non-Transition Eye
TL1 = 10 Inch 4-Mil FR4 Trace, No TL2
No Repeater, 8 Gbps

A. No Repeater Used
Composite Eye Height: 0.057 mV
Minimum Eye Width: 37.66 ps
Overall SigTest Result: Fail

Figure 45. PCIe Gen-3, Preset 7, Transition Eye
TL1 = 10 Inch 4-Mil FR4 Trace,
TL2 = 5 Inch 4-Mil FR4 Trace
No Repeater, 8 Gbps

A. No Repeater Used
Composite Eye Height: 0.057 mV
Minimum Eye Width: 37.66 ps
Overall SigTest Result: Fail

Figure 47. PCIe Gen-3, Preset 7, Non-Transition Eye
TL1 = 10 Inch 4-Mil FR4 Trace,
TL2 = 5 Inch 4-Mil FR4 Trace
No Repeater, 8 Gbps

A. DS125BR820 Settings: EQA = Level 4, VODA = Level 6
Composite Eye Height: 112.2 mV
Minimum Eye Width: 83.82 ps
Overall SigTest Result: Pass

Figure 42. PCIe Gen-3, Preset 7, Transition Eye
TL1 = 10 Inch 4-Mil FR4 Trace, No TL2
DS125BR820, 8 Gbps

A. DS125BR820 Settings: EQA = Level 4, VODA = Level 6
Composite Eye Height: 112.2 mV
Minimum Eye Width: 83.82 ps
Overall SigTest Result: Pass

Figure 44. PCIe Gen-3, Preset 7, Non-Transition Eye
TL1 = 10 Inch 4-Mil FR4 Trace, No TL2
DS125BR820, 8 Gbps

A. DS125BR820 Settings: EQA = Level 4, VODA = Level 6
Composite Eye Height: 77.26 mV
Minimum Eye Width: 78.24 ps
Overall SigTest Result: Pass

Figure 46. PCIe Gen-3, Preset 7, Transition Eye
TL1 = 10 Inch 4-Mil FR4 Trace,
TL2 = 5 Inch 4-Mil FR4 Trace
DS125BR820, 8 Gbps

A. DS125BR820 Settings: EQA = Level 4, VODA = Level 6
Composite Eye Height: 77.26 mV
Minimum Eye Width: 78.24 ps
Overall SigTest Result: Pass

Figure 48. PCIe Gen-3, Preset 7, Non-Transition Eye
TL1 = 10 Inch 4-Mil FR4 Trace,
TL2 = 5 Inch 4-Mil FR4 Trace
DS125BR820, 8 Gbps