SNLS686 February   2021 DS160PR421

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 High Speed Electrical Characteristics
    7. 6.7 SMBUS/I2C Timing Charateristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Linear Equalization
      2. 7.3.2 Flat Gain
      3. 7.3.3 Receiver Detect State Machine
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active PCIe Mode
      2. 7.4.2 Active Buffer Mode
      3. 7.4.3 Standby Mode
    5. 7.5 Programming
      1. 7.5.1 Control and Configuration Interface
        1. 7.5.1.1 Pin Mode
          1. 7.5.1.1.1 Four-Level Control Inputs
        2. 7.5.1.2 SMBUS/I2C Register Control Interface
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 PCIe x8 Lane Switching
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Pin-to-pin Passive versus Redriver Option
        4. 8.2.1.4 Application Curves
      2. 8.2.2 DisplayPort Application
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
  11. 11Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 DC Electrical Characteristics

over operating free-air temperature and voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Power
POWERCH Active power per channel GAIN1/0 = L3 120 mW
GAIN1/0 = L0 110 mW
IACTIVE Device current consumption when four channels are active GAIN1/0 = L3, PD = L 145 190 mA
ISTBY Device current consumption in standby power mode All channels disabled (PD = H) 30 45 mA
VREG Internal regulator output 2.5 V
Control IO
VIH High level input voltage SDA, SCL, PD,  SEL pins 2.1 V
VIL Low level input voltage SDA, SCL, PD, SEL pins 1.08 V
VOH High level output voltage Rpull-up = 4.7 kΩ (SDA, SCL pins) 2.1 V
VOL Low level output voltage IOL = –4 mA (SDA, SCL pins) 0.4 V
IIH,SEL Input high leakage current for SEL pin VInput = VCC 80 µA
IIH Input high leakage current VInput = VCC, (SCL, SDA, PD pins) 10 µA
IIL Input low leakage current VInput = 0 V, (SCL, SDA, PD, SEL pins) -10 µA
IIH,FS Input high leakage current for fail safe input pins VInput = 3.6 V, VCC = 0 V, (SCL, SDA, PD, SEL pins) 200 µA
CIN-CTRL Input capacitance SDA, SCL, PD, SEL pins 1.5 pF
4 Level IOs (MODE, GAIN, EQ0, EQ1, RX_DET pins)
IIH_4L Input high leakage current, 4 level IOs VIN = 2.5 V 10 µA
IIL_4L Input low leakage current for all 4 level IOs except MODE. VIN = GND -10 µA
IIL_4L,MODE Input low leakage current for MODE pin VIN = GND -200 µA
Receiver
VRX-DC-CM RX DC Common Mode (CM) Voltage Device is in active or standby state 2.5 V
ZRX-DC Rx DC Single-Ended Impedance 50 Ω
ZRX-HIGH-IMP-DC-POS DC input CM input impedance   during Reset or power-down Inputs are at CM voltage 20 kΩ
Transmitter
ZTX-DIFF-DC DC Differential Tx Impedance Impedance of Tx during active signaling, VID,diff = 1Vpp 100 Ω
VTX-DC-CM Tx DC common mode Voltage 0.75 V
ITX-SHORT Tx Short Circuit Current Total current the Tx can supply when shorted to GND 90 mA