SNLS733A December   2022  – October 2023 DS560MB410

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Revision History
  6. 5Description (Continued)
  7. 6Device and Documentation Support
    1. 6.1 Documentation Support
      1. 6.1.1 Related Documentation
    2. 6.2 Receiving Notification of Documentation Updates
    3. 6.3 Support Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Glossary
  8. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The DS560MB410 is a low-power, high-performance four-channel linear equalizer supporting multi-rate, multi-protocol interfaces up to 28 GBd using four-level pulse amplitude modulation (PAM4), or up to 32 GBd using non-return-to-zero (NRZ) modulation. It is used to extend the reach and robustness of high-speed serial links for backplane, midplane, and active copper cable (ACC) applications. The DS560MB410 can increase the reach between two ASICs by 18+ dB beyond the normal ASIC-to-ASIC reach.

Each channel operates independently with a user-selectable CTLE boost profile optimized for equalizing either PCB or copper cable loss profiles. The linear nature of the DS560MB410’s equalization preserves input signal characteristics traveling through the redriver. This transparency allows link partner ASICs to negotiate Tx equalizer coefficients freely during link training and to support individual lane Forward Error Correction (FEC) pass-through in mission mode with minimal effect on latency.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
DS560MB410 ZAS (nFBGA, 101) 6 mm × 6 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-20210901-SS0I-MQBL-BVV5-ZTV8BHFQC0NP-low.svg Simplified Schematic