SNLS324F
April 2011 – August 2021
DS80PCI402
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings (1) (1) (1)
6.2
ESD Ratings
6.3
Recommended Operating Ratings
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Electrical Characteristics — Serial Management Bus Interface
6.7
Typical Characteristics
7
Parameter Measurement Information
7.1
15
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
4-Level Input Configuration Guidelines
8.4
Device Functional Modes
8.4.1
Pin Control Mode
8.4.2
SMBUS Mode
8.5
Programming
8.5.1
System Management Bus (SMBus) and Configuration Registers
8.5.2
Transfer of Data Through the SMBus
8.5.3
Writing a Register
8.5.4
Reading a Register
8.5.5
SMBus Controller Mode
8.6
Register Maps
31
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
3.3-V or 2.5-V Supply Mode Operation
10.2
Power Supply Bypassing
11
Layout
11.1
Layout Guidelines
11.1.1
PCB Layout Considerations for Differential Pairs
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
NJY|54
MPQS027A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snls324f_oa
snls324f_pm
2
Applications
PCI express Gen-1, Gen-2, and Gen-3