SNLS198C September 2005 – July 2021 DS90LV011AH
PRODUCTION DATA
The DS90LV011AH is a single-channel, low-voltage differential signaling (LVDS) line driver with a balanced current source design. It operates from a single supply that is nominally 3.3 V, but can be as low as 3.0 V and as high as 3.6 V. The input signal to the DS90LV011AH is an LVCMOS/LVTTL signal. The output of the device is a differential signal complying with the LVDS standard (TIA/EIA-644). The differential output signal operates with a signal level of 350 mV, nominally, at a common-mode voltage of 1.2 V. This low differential output voltage results in low electromagnetic interference (EMI). The differential nature of the output provides immunity to common-mode coupled signals that the driven signal may experience.
The DS90LV011AH is primarily used in point-to-point configurations, as seen in Figure 9-1. This configuration provides a clean signaling environment for the fast edge rates of the DS90LV011AH and other LVDS drivers. The DS90LV011AH is connected through a balanced media which may be a standard twisted pair cable, a parallel pair cable, or simply PCB traces to a LVDS receiver. Typically, the characteristic differential impedance of the media is in the range of 100 Ω. The DS90LV011AH device is intended to drive a 100-Ω transmission line. The 100-Ω termination resistor is selected to match the media and is located as close to the LVDS receiver input pins as possible.