SNLS201B September   2005  – January 2019 DS90LV028AH

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Connection Diagram
      2.      Functional Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Termination
      2. 8.3.2 Threshold
      3. 8.3.3 Fail-Safe Feature
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Receiver Bypass Capacitance
        2. 9.2.2.2 Interconnecting Media
        3. 9.2.2.3 PCB Transmission Lines
        4. 9.2.2.4 Input Fail-Safe Biasing
        5. 9.2.2.5 Probing LVDS Transmission Lines on PCB
        6. 9.2.2.6 Cables and Connectors, General Comments
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.2 Threshold

The LVDS Standard (ANSI/TIA/EIA-644-A) specifies a maximum threshold of ±100 mV for the LVDS receiver. The DS90LV028AH supports an enhanced threshold region of −100 mV to 0 V. This is useful for fail-safe biasing. The threshold region is shown in the Voltage Transfer Curve (VTC) in Figure 16. The typical DS90LV028AH LVDS receiver switches at about −30 mV. Note that with VID = 0 V, the output will be in a HIGH state. With an external fail-safe bias of +25 mV applied, the typical differential noise margin is now the difference from the switch point to the bias point. In the example shown in Figure 16, this would be 55 mV of Differential Noise Margin (DNM) (+25 mV − (−30 mV)). With the enhanced threshold region of −100 mV to 0 V, this small external fail-safe biasing of +25 mV (with respect to 0 V) gives a DNM of a comfortable 55 mV. With the standard threshold region of ±100 mV, the external fail-safe biasing must be +25 mV with respect to +100 mV or +125 mV, giving a DNM of 155 mV that is a stronger fail-safe biasing than necessary for the DS90LV028AH. If more DNM is required, then a stronger fail-safe bias point can be set by changing resistor values.

DS90LV028AH 20015029.pngFigure 16. VTC of the DS90LV028AH LVDS Receiver