SNLS200B September   2005  – January 2019 DS90LV049H

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Dual-In-Line
      2.      Functional Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DS90LV049H LVDS Driver and Receiver Functionality
      2. 8.3.2 Termination
      3. 8.3.3 Fail-Safe Feature
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Decoupling Recommendations
        2. 9.2.2.2 PCB Transmission Lines
        3. 9.2.2.3 Input Fail-Safe Biasing
        4. 9.2.2.4 Probing LVDS Transmission Lines on PCB
        5. 9.2.2.5 Interconnecting Media
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2.3 Input Fail-Safe Biasing

External pullup and pulldown resistors may be used to provide enough of an offset to enable an input fail-safe under open-circuit conditions. This configuration ties the positive LVDS input pin to VDD through a pullup resistor, and the negative LVDS input pin is tied to GND by a pulldown resistor. The pullup and pulldown resistors should be in the 5 kΩ to 15 kΩ range to minimize loading and waveform distortion to the driver. The common-mode bias point should ideally be set to approximately 1.2 V (less than 1.75 V) to be compatible with the internal circuitry. Refer to application note AN-1194 Fail-Safe Biasing of LVDS Interfaces (SNLA051) for more information.