SNLS200B September 2005 – January 2019 DS90LV049H
PRODUCTION DATA.
The DS90LV049H integrates both low-voltage differential signaling (LVDS) line drivers, with a balanced current source design, and LVDS line receivers into a single package. This device operates from a single power supply that is nominally 3.3 V, but the supply can be as low as 3.0 V and as high as 3.6 V. The input signal to the DS90LV049H LVDS line drivers is an LVCMOS/LVTTL signal. The output of the DS90LV049H LVDS line drivers is a differential signal complying with the LVDS standard (TIA/EIA-644). The input to the DS90LV049H LVDS line receivers is a differential signal complying with the LVDS Standard (TIA/EIA-644) and the output is a 3.3-V LVCMOS/LVTTL signal. The differential output signal of the DS90LV049H LVDS line drivers operates with a signal level of 350 mV, nominally, at a common-mode voltage of 1.2 V. This low differential output voltage results in low electromagnetic interference (EMI). The differential input signal of the DS90LV049H LVDS line receivers operates with a signal level of 350 mV, nominally, at a common-mode voltage of 1.2 V. The differential nature of the LVDS outputs and inputs provides immunity to common-mode coupled signals (noise) that the driven/received signal may experience.
The DS90LV049H is primarily used in point-to-point configurations, as seen in Figure 11. This configuration provides a clean signaling environment for the fast edge rates of the DS90LV049H and other LVDS components. The DS90LV049H is connected through a balanced media which may be a standard twisted-pair cable, a parallel pair cable, or simply PCB traces to a LVDS receiver. Typically, the characteristic differential impedance of the media is in the range of 100 Ω. The DS90LV049H device is intended to drive a 100-Ω transmission line. The 100-Ω termination resistor is selected to match the media and is placed as close to the LVDS receiver input pins as possible.