SNLS708 February 2023 DS90UB638-Q1
PRODUCTION DATA
The FPD-Link III Port Select register configures which port is accessed in I2C commands to unique Rx Port registers 0x4D - 0x7F and 0xD0 - 0xDF. A 2-bit RX_READ_PORT field provides for reading values from a single port. The 4-bit RX_WRITE_PORT field provides individual enables for each port, allowing simultaneous writes broadcast to both of the FPD-Link III Receive port register blocks in unison. The DS90UB638-Q1 maintains separate page control, preventing conflict between sources.
BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
---|---|---|---|---|
7 | RESERVED | R | 0 | Reserved |
6 | RESERVED | R | 0 | Reserved |
5 | RESERVED | R | 0 | Reserved |
4 | RESERVED | RW | 0 | Reserved |
3:2 | RESERVED | R | 0 | Reserved |
1 | RESERVED | RW | 0 | Reserved |
0 | RX_WRITE_PORT_0 | RW | 0 1 for RX Port 0 |
Write Enable for RX port 0
registers This bit enables writes to RX port 0 registers. This applies to all paged FPD-Link III Receiver port registers. 0: Writes disabled 1: Writes enabled When accessed via Bi-directional Control Channel, the default value is 1 if accessed over RX port 0. |