SNLS708 February 2023 DS90UB638-Q1
PRODUCTION DATA
Configuration of the FPD-Link III operating input mode may be done through the MODE input strap pin, or through the configuration register bits. A pullup resistor and a pull-down resistor of suggested values may be used to set the voltage ratio of the MODE input (VTARGET) and V(VDD18) to select one of the mode. The DS90UB638-Q1 waits 1 ms after PDB goes high to allow time for power supply transients before sampling the MODE pin strap value and configuring the device to set the I2C address. The DS90UB638-Q1 operating mode is:
MODE NO. | VTARGET VOLTAGE RANGE | VTARGET STRAP VOLTAGE | SUGGESTED STRAP RESISTORS (1% TOL) | RX MODE | |||
---|---|---|---|---|---|---|---|
VMIN | VTYP | VMAX | VDD18 = 1.8 V | RHIGH (kΩ) | RLOW (kΩ) | ||
0 | 0 | 0 | 0.131 × V(VDD18) | 0 | OPEN | 10.0 | CSI-2 non-synchronous Back Channel |
1 | 0.296 × V(VDD18) | 0.330 × V(VDD18) | 0.362 × V(VDD18) | 0.582 | 75.0 | 35.7 | RAW12 HF |
0.761 × V(VDD18) | 0.792 × V(VDD18) | 0.823 × V(VDD18) | 1.420 | 25.5 | 95.3 | ||
2 | 0.412 × V(VDD18) | 0.443 × V(VDD18) | 0.474 × V(VDD18) | 0.792 | 71.5 | 56.2 | RAW10 |
0.876 × V(VDD18) | V(VDD18) | V(VDD18) | 1.8 | 10.0 | OPEN | ||
3 | 0.525 × V(VDD18) | 0.559 × V(VDD18) | 0.592 × V(VDD18) | 0.995 | 78.7 | 97.6 | CSI-2 Synchronous Back Channel |
The strapped values can be viewed and modified in the following locations: