SNLS759
February 2024
DS90UH983-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device and Documentation Support
4.1
Documentation Support
4.1.1
Related Documentation
4.2
Receiving Notification of Documentation Updates
4.3
Support Resources
4.4
Trademarks
4.5
Electrostatic Discharge Caution
4.6
Glossary
5
Revision History
6
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTD|64
MPQF141C
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snls759_oa
snls759_pm
1
Features
DisplayPort receiver
DP/eDP v1.4 compatible
Supports data lane swap and polarity inversion
HBR3/HBR2/HBR/RBR link bit rates
Main link: 1, 2, or 4 lanes
Each lane up to 8.1Gbps
AUX CH 1Mbps
Hot plug detect (HPD)
Multi-display (MST) and SST support
Supports Symmetric and Asymmetric MST
Daisy chaining and splitting
SuperFrame unpacking capability
Suitable for
4K
at 60Hz video resolution
FPD-Link IV interface
Supports 13.5/12.528/10.8/6.75/3.375Gbps per channel; Up to 27Gbps over dual channels
Coax/STP interconnect support
Port splitting to enable Y-cable interfaces
MST and SuperFrame based data splitting to different FPD channels
Ultra-low latency control channel
Three fast-mode plus I
2
C up to 1MHz (up to 3.4MHz for local bus access)
High speed GPIOs
Backwards compatibility
IVI 94x and 92x product families
Security and diagnostics
Integrated HDCP v1.4 with on-chip keys for FPD-Link III
Link diagnostics
Voltage and temperature monitoring
Line fault detection
BIST and pattern generation
CRC and error diagnostics
ECC error correction for control bits
Replica mode for redundancy
Advanced link robustness and EMC control
Spread Spectrum Clocking (SSC) input support
Spread Spectrum Clocking Generation (SSCG)
Data scrambling
Low power operation
1.8V and 1.15V dual power supply
AEC-Q100 qualified for automotive applications
AEC-Q grade-level 2, –40°C to 105°C
64 pin QFN wettable flanks 9mm × 9mm
ISO 10605 and IEC 61000-4-2 ESD compliant