SNLS765 February   2024 DS90UH988-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Device and Documentation Support
    1. 4.1 Documentation Support
      1. 4.1.1 Related Documentation
    2. 4.2 Community Resources
    3. 4.3 Trademarks
  6. 5Revision History
  7. 6Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The DS90UH988-Q1 is an FPD-Link IV to OpenLDI bridge device. In conjunction with an FPD-Link IV serializer, the chipset receives a high-speed serialized interface over low-cost 50Ω coax or STP/STQ cables. The DS90UH988-Q1 supports OpenLDI (10 LVDS data lanes + 2 clocks) interface with video up to 420MHz PCLK. This provides a bridge between sources such as GPUs to connect to existing LVDS based displays or application processors.

The FPD-Link IV interface supports video and audio data transmission and full duplex control, including I2C, and GPIO data over the same link. Consolidation of video and control data over FPD-Link IV lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In backward compatible FPD-Link III mode, the device supports up to 2K resolutions with 24-bit color depth over a single/dual link as well as HDCP v1.4 support when paired with an HDCP capable serializer.

Package Information
PART NUMBER PACKAGE (1) PACKAGE SIZE(2)
DS90UH988-Q1 RUR (VQFNP, 88) 12mm × 12mm
For all available packages, see Section 6.
The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-20210715-CA0I-H6TT-S01N-MNFJC6HKKQ0L-low.svg Applications Diagram