SNOS521E January   2001  – January 2018 DS92LV040A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Simplified Functional Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 AC Electrical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Test Circuits and Timing Waveforms
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Multipoint Communications
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Supply Voltage
        2. 9.2.3.2 Supply Bypass Capacitance
        3. 9.2.3.3 Termination Resistors
        4. 9.2.3.4 Interconnecting Media
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

DC Electrical Characteristics(1)

Over recommended operating supply voltage and temperature ranges unless otherwise specified.(2)(3)
PARAMETERTEST CONDITIONSPINMINTYPMAXUNIT
VOD Output Differential Voltage RL = 27Ω, Figure 1 DO+/RI+,
DO−/RI−
200 300 460 mV
ΔVOD VOD Magnitude Change 5 27 mV
VOS Offset Voltage 1.1 1.3 1.5 V
ΔVOS Offset Magnitude Change 5 10 mV
VOHD Driver Output High Voltage RL = 27Ω 1.4 1.65 V
VOLD Driver Output Low Voltage RL = 27Ω 0.95 1.1 V
IOSD Driver Output Short Circuit Current VOD = 0V, DE = VCC, Driver outputs shorted together |30| | 45| mA
VOHR Receiver Voltage Output High(4) VID = +300 mV IOH = −4 mA ROUT VCC−0.2 V
Inputs Open VCC−0.2 V
Inputs Terminated,
RL = 27Ω
VCC−0.2 V
VOLR Receiver Voltage Output Low IOL = 4.0 mA, VID = −300 mV 0.05 0.100 V
IOD Receiver Output Dynamic Current VID = 300mV, VOUT = VCC−1.0V −50 |33| mA
VID = −300mV, VOUT = 1.0V |36| 60 mA
VTH Input Threshold High(5) DE = 0V, Over common mode range DO+/RI+,
DO−/RI−
−40 0 mV
VTL Input Threshold Low(5) −70 −40 mV
VCMR Receiver Common Mode Range |VID|/2 2.4 − |VID|/2 V
IIN Input Current DE = 0V, RE = 2.4V,
VIN = +2.4V or 0V
−20 ±1 +20 µA
VCC = 0V, VIN = +2.4V or 0V −20 ±1 +20 µA
VIH Minimum Input High Voltage DIN, DE, RE 2.0 VCC V
VIL Maximum Input Low Voltage GND 0.8 V
IIH Input High Current VIN = VCC or 2.4V −20 ±2.5 +20 µA
IIL Input Low Current VIN = GND or 0.4V −20 ±2.5 +20 µA
VCL Input Diode Clamp Voltage ICLAMP = −18 mA −1.5 −0.8 V
ICCD Power Supply Current Drivers Enabled, Receivers Disabled No Load, DE = RE = VCC,
DIN = VCC or GND
VCC 20 40 mA
ICCR Power Supply Current Drivers Disabled, Receivers Enabled DE = RE = 0V, VID = ±300mV 27 40 mA
ICCZ Power Supply Current, Drivers and Receivers TRI-STATE DE = 0V; RE = VCC,
DIN = VCC or GND
28 40 mA
ICC Power Supply Current, Drivers and Receivers Enabled DE = VCC; RE = 0V,
DIN = VCC or GND,
RL = 27Ω
70 100 mA
IOFF Power Off Leakage Current VCC = 0V or OPEN,
DIN, DE, RE = 0V or OPEN,
VAPPLIED = 3.6V (Port Pins)
DO+/RI+,
DO−/RI−
−20 +20 µA
COUTPUT Capacitance at Bus Pins DO+/RI+,
DO−/RI−
5 pF
cOUTPUT Capacitance at ROUT ROUT 5 pF
The DS92LV040A functions within datasheet specification when a resistive load is applied to the driver outputs.
All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified except VOD, ΔVOD and VID.
All typicals are given for VCC = +3.3 V and TA = +25°C, unless otherwise stated.
VOH fail-safe terminated test performed with 27 Ω connected between RI+ and RI− inputs. No external voltage is applied.
Propagation delays, transition times, and receiver threshold are ensured by design and characterization.