SLVSEO3 July   2018 ESD351

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Typical USB 2.0 Application Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings -JEDEC Specifications
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Signal Range
        2. 8.2.2.2 Operating Frequency
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.7 Typical Characteristics

ESD351 D001_Positive_TLP.gifFigure 1. TLP I-V Curve, I/O Pin to GND (tp = 100 ns)
ESD351 D003_Positive_IEC.gifFigure 3. 8-kV IEC 61000-4-2 Clamping Voltage, I/O pin to GND
ESD351 D005_Surge.gifFigure 5. Surge Curve (IEC 61000-4-5, tp = 8/20 µs), I/O Pin to GND
ESD351 D007_Leakage.gifFigure 7. Leakage Current at 3.6 V Bias Voltage Across Temperature, I/O Pin to GND
ESD351 D009_InsertionLoss.gifFigure 9. Insertion Loss Vs. Frequency
ESD351 D002_Negative_TLP.gifFigure 2. TLP I/V Curve, GND to I/O Pin (tp = 100 ns)
ESD351 D004_Negative_IEC.gifFigure 4. 8-kV IEC 61000-4-2 Clamping Voltage, GND to I/O Pin
ESD351 D006_DC.gifFigure 6. DC IV-Curve, I/O Pin to GND
ESD351 D008_Cap.gifFigure 8. Capacitance Vs. Bias Voltage at Different Temperatures (°C)