SLVSI90 November   2024 ESD701-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings - AEC Specifications
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 ESD Ratings - ISO Specifications
    5. 5.5 Recommended Operating Conditions
    6. 5.6 Thermal Information
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Device and Documentation Support
    1. 6.1 Documentation Support
      1. 6.1.1 Related Documentation
    2. 6.2 Receiving Notification of Documentation Updates
    3. 6.3 Support Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Glossary
  8. 7 Receiving Notification of Documentation Updates
  9. 8 Support Resources
  10. 9 Trademarks
  11. 10Electrostatic Discharge Caution
  12. 11Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Thermal Information

THERMAL METRIC (1)ESD701-Q1UNIT
DPY (DFN1006)
2 PINS
RθJA Junction-to-ambient thermal resistance262.6°C/W
RθJC(top)Junction-to-case (top) thermal resistance132.3°C/W
RθJBJunction-to-board thermal resistance78.5°C/W
ΨJTJunction-to-top characterization parameter2.2°C/W
ΨJBJunction-to-board characterization parameter78.0°C/W
RθJC(bot)Junction-to-case (bottom) thermal resistanceNA°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.