SLVSEG8B May   2018  – January 2024 ESDS302 , ESDS304

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings - JEDEC Specifications
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Signal Range
        2. 7.2.2.2 Operating Frequency
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Typical Characteristics

GUID-86B6CF92-7681-4C27-BD21-8A37D2CE17D4-low.gif
Figure 5-1 Surge Clamping Voltage vs. Peak Pulse Current (IEC 61000-4-5, tp = 8/20µs), Any IO Pin to GND
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Figure 5-3 Surge Current, Clamping Voltage and Power Waveform (IEC-61000-4-5, tp = 8/20µs), Any IO Pin to GND
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Figure 5-5 TLP I-V Curve, IO to GND, tp = 100ns
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Figure 5-7 +8kV IEC 61000-4-2 Clamping Voltage Waveform, IO Pin to GND
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Figure 5-9 DC Leakage Current vs. Ambient Temperature, Bias Voltage = 3.6V
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Figure 5-11 Surge Power Derating with Respect to Ambient Temperature
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Figure 5-2 Surge Clamping Voltage vs. Peak Pulse Current (IEC 61000-4-5, tp = 8/20µs), GND to IO Pin
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Figure 5-4 DC I-V Curve
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Figure 5-6 TLP I-V Curve, IO to GND Negative, tp = 100ns
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Figure 5-8 -8kV IEC 61000-4-2 Clamping Voltage Waveform, IO Pin to GND
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Figure 5-10 Capacitance vs. Bias Voltage at 25°C
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Figure 5-12 Differential Insertion Loss vs. Frequency