SLVSEG8B May   2018  – January 2024 ESDS302 , ESDS304

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings - JEDEC Specifications
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Signal Range
        2. 7.2.2.2 Operating Frequency
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Electrical Characteristics

At TA = 25°C unless otherwise noted
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VRWMReverse stand-off voltageIIO < 500nA, across operating temperature range3.6V
ILEAKAGELeakage current at 3.6VVIO = 3.6V,  Any IO pin to GND350nA
VBRFBreakdown voltage, Any IO pin to GND (1)IIO = 1mA4.57.5V
VFWDDiode forward voltage, GND to IO pinIIO = 1mA0.8V
VHOLDHolding voltage, Any IO pin to GND (2)IIO = 1mA5V
VCLAMPSurge Clamping voltage, tp = 8/20µsIPP = 1 A, Any IO pin to GND5.1V
IPP = 12A, Any IO pin to GND6V
IPP = 1 A, GND to any IO pin1.2V
IPP = 12A, GND to any IO pin3V
TLP Clamping Voltage, tp = 100nsIPP = 16A, any IO to GND pin5.8V
IPP = 16A, GND to any IO pin3.1V
CLINELine capacitance, any IO to GNDVIO = 0V, Vp-p = 30mV, f = 1MHz2.32.8pF
ΔCLINEVariation of line capacitanceCLINE1 - CLINE2, VIO = 0V, Vp-p = 30mV, f = 1MHz0.050.1pF
CCROSSLine-to-line capacitanceVIO = 0V, Vrms = 30mV, f = 1MHz1.251.5pF
(1) VBRF is defined as the max voltage obtained at 1mA when sweeping the voltage up, before the device latches into the snapback state
(2) VHOLD is defined as the voltage when 1mA is applied, after the device has successfully latched into the snapback state.