SPRS742L June 2011 – February 2021 F28M35E20B , F28M35H22C , F28M35H52C , F28M35H52C-Q1 , F28M35M22C , F28M35M52C
PRODUCTION DATA
The ten pins of AIO_MUX1 can be selectively mapped through a dedicated set of registers to 12 analog inputs for ADC1 peripheral, six analog inputs for Comparator peripherals, four General-Purpose Inputs, or four General-Purpose Outputs. While AIO_MUX1 has been named after the analog signals passing through it, the GPIOs (here called AIOs) are still digital, although with fewer features than those in the GPIO_MUX1 and GPIO_MUX2 blocks—for example, they do not offer pullups. On reset, all pins of the AIO_MUX1 block are configured as analog inputs and the GPIO function is disabled. The AIO_MUX1 block is programmed through a separate set of registers from those used to program AIO_MUX2.
The multiple registers responsible for configuring the AIO_MUX1 pins are accessible by the C28x CPU only. The top portion of Figure 8-17 shows Control Subsystem registers and muxing logic for the associated ten AIO pins. The AIOMUX1 register selects one of ten possible analog input signals or one of four general-purpose AIO inputs. Other registers allow reading and writing of the four AIO bits, as well as setting the direction for each of the bits (read or write). See Table 8-31 for the mapping of analog inputs and AIOs to the ten pins of AIO_MUX1.
AIO Mode 0 is chosen by setting selected odd bits of the AIOMUX1 register to ‘0’. AIO Mode 1 is chosen by setting selected odd bits of the AIOMUX1 register to ‘1’. For example, setting bit 5 of the AIOMUX1 register to ‘0’ assigns pin ADC1INA2 to internal signal AIO2 (digital GPIO). Setting bit 5 of the AIOMUX1 register to ‘1’ assigns pin ADC1INA2 to analog inputs ADC1INA2 or COMPA1 (only one should be enabled at a time in the respective analog module). Currently, all even bits of the AIOMUX1 register are “don’t cares”.
DEVICE PIN NAME(1)(2) | C28x AIO MODE 0(3) | C28x AIO MODE 1(4) |
---|---|---|
ADC1INA0 | – | ADC1INA0 |
ADC1INA2 | AIO2 | ADC1INA2, COMPA1 |
ADC1INA3 | – | ADC1INA3 |
ADC1INA4 | AIO4 | ADC1INA4, COMPA2 |
ADC1INA6 | AIO6 | ADC1INA6, COMPA3 |
ADC1INA7 | – | ADC1INA7 |
ADC1INB0 | – | ADC1INB0 |
ADC1INB3 | – | ADC1INB3 |
ADC1INB4 | AIO12 | ADC1INB4, COMPB2 |
ADC1INB7 | – | ADC1INB7 |