SNOSCZ5B
June 2015 – October 2024
FDC2112
,
FDC2114
,
FDC2212
,
FDC2214
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics - I2C
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
Clocking Architecture
7.3.2
Multi-Channel and Single-Channel Operation
7.3.3
Gain and Offset (FDC2112, FDC2114 Only)
7.3.4
Current Drive Control Registers
7.3.5
Device Status Registers
7.3.6
Input Deglitch Filter
7.4
Device Functional Modes
7.4.1
Start-Up Mode
7.4.2
Normal (Conversion) Mode
7.4.3
Sleep Mode
7.4.4
Shutdown Mode
7.4.4.1
Reset
7.5
Programming
7.5.1
I2C Interface Specifications
7.6
Register Maps
7.6.1
Register List
7.6.2
Address 0x00, DATA_CH0
7.6.3
Address 0x01, DATA_LSB_CH0 (FDC2212 / FDC2214 only)
7.6.4
Address 0x02, DATA_CH1
7.6.5
Address 0x03, DATA_LSB_CH1 (FDC2212 / FDC2214 only)
7.6.6
Address 0x04, DATA_CH2 (FDC2114, FDC2214 only)
7.6.7
Address 0x05, DATA_LSB_CH2 (FDC2214 only)
7.6.8
Address 0x06, DATA_CH3 (FDC2114, FDC2214 only)
7.6.9
Address 0x07, DATA_LSB_CH3 (FDC2214 only)
7.6.10
Address 0x08, RCOUNT_CH0
7.6.11
Address 0x09, RCOUNT_CH1
7.6.12
Address 0x0A, RCOUNT_CH2 (FDC2114, FDC2214 only)
7.6.13
Address 0x0B, RCOUNT_CH3 (FDC2114, FDC2214 only)
7.6.14
Address 0x0C, OFFSET_CH0 (FDC21112 / FDC2114 only)
7.6.15
Address 0x0D, OFFSET_CH1 (FDC21112 / FDC2114 only)
7.6.16
Address 0x0E, OFFSET_CH2 (FDC2114 only)
7.6.17
Address 0x0F, OFFSET_CH3 (FDC2114 only)
7.6.18
Address 0x10, SETTLECOUNT_CH0
7.6.19
Address 0x11, SETTLECOUNT_CH1
7.6.20
Address 0x12, SETTLECOUNT_CH2 (FDC2114, FDC2214 only)
7.6.21
Address 0x13, SETTLECOUNT_CH3 (FDC2114, FDC2214 only)
7.6.22
Address 0x14, CLOCK_DIVIDERS_CH0
7.6.23
Address 0x15, CLOCK_DIVIDERS_CH1
7.6.24
Address 0x16, CLOCK_DIVIDERS_CH2 (FDC2114, FDC2214 only)
7.6.25
Address 0x17, CLOCK_DIVIDERS_CH3 (FDC2114, FDC2214 only)
7.6.26
Address 0x18, STATUS
7.6.27
Address 0x19, ERROR_CONFIG
7.6.28
Address 0x1A, CONFIG
7.6.29
Address 0x1B, MUX_CONFIG
7.6.30
Address 0x1C, RESET_DEV
7.6.31
Address 0x1E, DRIVE_CURRENT_CH0
7.6.32
Address 0x1F, DRIVE_CURRENT_CH1
7.6.33
Address 0x20, DRIVE_CURRENT_CH2 (FDC2114 / FDC2214 only)
7.6.34
Address 0x21, DRIVE_CURRENT_CH3 (FDC2114 / FDC2214 only)
7.6.35
Address 0x7E, MANUFACTURER_ID
7.6.36
Address 0x7F, DEVICE_ID
8
Application and Implementation
8.1
Application Information
8.1.1
Sensor Configuration
8.1.2
Shield
8.1.3
Power-Cycled Applications
8.1.4
Inductor Self-Resonant Frequency
8.1.5
Application Curves
8.2
Typical Application
8.2.1
Schematic
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
8.2.3.1
Recommended Initial Register Configuration Values
8.2.4
Application Curve
8.3
Best Design Practices
8.4
Power Supply Recommendations
8.5
Layout
8.5.1
Layout Guidelines
8.5.2
Layout Example
9
Device and Documentation Support
9.1
Receiving Notification of Documentation Updates
9.2
Support Resources
9.3
Trademarks
9.4
Electrostatic Discharge Caution
9.5
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DNT|12
MPDS488B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snoscz5b_oa
snoscz5b_pm
7.6.5
Address 0x03, DATA_LSB_CH1 (
FDC2212 / FDC2214
only)
Figure 7-13 Address 0x03, DATA_LSB_CH1
15
14
13
12
11
10
9
8
DATA1
7
6
5
4
3
2
1
0
DATA1
Table 7-15 Address 0x03, DATA_CH1 Field Descriptions
Bit
Field
Type
Reset
Description
15:0
DATA1[15:0]
R
0000 0000 0000
Channel 1 Conversion Result