SNOSCZ5B June   2015  – October 2024 FDC2112 , FDC2114 , FDC2212 , FDC2214

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics - I2C
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Clocking Architecture
      2. 7.3.2 Multi-Channel and Single-Channel Operation
      3. 7.3.3 Gain and Offset (FDC2112, FDC2114 Only)
      4. 7.3.4 Current Drive Control Registers
      5. 7.3.5 Device Status Registers
      6. 7.3.6 Input Deglitch Filter
    4. 7.4 Device Functional Modes
      1. 7.4.1 Start-Up Mode
      2. 7.4.2 Normal (Conversion) Mode
      3. 7.4.3 Sleep Mode
      4. 7.4.4 Shutdown Mode
        1. 7.4.4.1 Reset
    5. 7.5 Programming
      1. 7.5.1 I2C Interface Specifications
    6. 7.6 Register Maps
      1. 7.6.1  Register List
      2. 7.6.2  Address 0x00, DATA_CH0
      3. 7.6.3  Address 0x01, DATA_LSB_CH0 (FDC2212 / FDC2214 only)
      4. 7.6.4  Address 0x02, DATA_CH1
      5. 7.6.5  Address 0x03, DATA_LSB_CH1 (FDC2212 / FDC2214 only)
      6. 7.6.6  Address 0x04, DATA_CH2 (FDC2114, FDC2214 only)
      7. 7.6.7  Address 0x05, DATA_LSB_CH2 (FDC2214 only)
      8. 7.6.8  Address 0x06, DATA_CH3 (FDC2114, FDC2214 only)
      9. 7.6.9  Address 0x07, DATA_LSB_CH3 (FDC2214 only)
      10. 7.6.10 Address 0x08, RCOUNT_CH0
      11. 7.6.11 Address 0x09, RCOUNT_CH1
      12. 7.6.12 Address 0x0A, RCOUNT_CH2 (FDC2114, FDC2214 only)
      13. 7.6.13 Address 0x0B, RCOUNT_CH3 (FDC2114, FDC2214 only)
      14. 7.6.14 Address 0x0C, OFFSET_CH0 (FDC21112 / FDC2114 only)
      15. 7.6.15 Address 0x0D, OFFSET_CH1 (FDC21112 / FDC2114 only)
      16. 7.6.16 Address 0x0E, OFFSET_CH2 (FDC2114 only)
      17. 7.6.17 Address 0x0F, OFFSET_CH3 (FDC2114 only)
      18. 7.6.18 Address 0x10, SETTLECOUNT_CH0
      19. 7.6.19 Address 0x11, SETTLECOUNT_CH1
      20. 7.6.20 Address 0x12, SETTLECOUNT_CH2 (FDC2114, FDC2214 only)
      21. 7.6.21 Address 0x13, SETTLECOUNT_CH3 (FDC2114, FDC2214 only)
      22. 7.6.22 Address 0x14, CLOCK_DIVIDERS_CH0
      23. 7.6.23 Address 0x15, CLOCK_DIVIDERS_CH1
      24. 7.6.24 Address 0x16, CLOCK_DIVIDERS_CH2 (FDC2114, FDC2214 only)
      25. 7.6.25 Address 0x17, CLOCK_DIVIDERS_CH3 (FDC2114, FDC2214 only)
      26. 7.6.26 Address 0x18, STATUS
      27. 7.6.27 Address 0x19, ERROR_CONFIG
      28. 7.6.28 Address 0x1A, CONFIG
      29. 7.6.29 Address 0x1B, MUX_CONFIG
      30. 7.6.30 Address 0x1C, RESET_DEV
      31. 7.6.31 Address 0x1E, DRIVE_CURRENT_CH0
      32. 7.6.32 Address 0x1F, DRIVE_CURRENT_CH1
      33. 7.6.33 Address 0x20, DRIVE_CURRENT_CH2 (FDC2114 / FDC2214 only)
      34. 7.6.34 Address 0x21, DRIVE_CURRENT_CH3 (FDC2114 / FDC2214 only)
      35. 7.6.35 Address 0x7E, MANUFACTURER_ID
      36. 7.6.36 Address 0x7F, DEVICE_ID
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Sensor Configuration
      2. 8.1.2 Shield
      3. 8.1.3 Power-Cycled Applications
      4. 8.1.4 Inductor Self-Resonant Frequency
      5. 8.1.5 Application Curves
    2. 8.2 Typical Application
      1. 8.2.1 Schematic
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Recommended Initial Register Configuration Values
      4. 8.2.4 Application Curve
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Unless otherwise specified, all limits ensured for TA = 25°C, VDD = 3.3V(1)
PARAMETERTEST CONDITIONS(2)MIN(3)TYP(4)MAX(3)UNIT
POWER
VDDSupply voltageTA = –40°C to +125°C2.73.6V
IDDSupply current (not including sensor current)(5)CLKIN = 10MHz(6)2.1mA
IDDSLSleep mode supply current(5)3560µA
ISDShutdown mode supply current(5)0.21µA
CAPACITIVE SENSOR
CSENSORMAXMaximum sensor capacitance1mH inductor, 10kHz oscillation250nF
CINSensor pin parasitic capacitance4pF
NBITSNumber of bitsFDC2112, FDC2114
RCOUNT ≥ 0x0400		12bits
FDC2212, FDC2214
RCOUNT = 0xFFFF		28bits
fCSMaximum channel sample rateFDC2112, FDC2114
single active channel continuous conversion, SCL = 400kHz		13.3kSPS
FDC2212, FDC2214
single active channel continuous conversion, SCL= 400kHz		4.08kSPS
EXCITATION
fSENSORSensor excitation frequencyTA = –40°C to +125°C0.0110MHz
VSENSORMINMinimum sensor oscillation amplitude (pk)(7)1.2V
VSENSORMAXMaximum sensor oscillation amplitude (pk)1.8V
ISENSORMAXSensor maximum current driveHIGH_CURRENT_DRV = b0
DRIVE_CURRENT_CH0 = 0xF800		1.5mA
HIGH_CURRENT_DRV = b1
DRIVE_CURRENT_CH0 = 0xF800
Channel 0 only		6mA
CONTROLLER CLOCK
fCLKINExternal controller clock input frequency (CLKIN)TA = –40°C to +125°C240MHz
CLKINDUTY_MINExternal controller clock minimum acceptable duty cycle (CLKIN)40%
CLKINDUTY_MAXExternal controller clock maximum acceptable duty cycle (CLKIN)60%
VCLKIN_LOCLKIN low voltage threshold0.3*VDDV
VCLKIN_HICLKIN high voltage threshold0.7*VDDV
fINTCLKInternal controller clock frequency range3543.455MHz
TCf_int_μInternal controller clock temperature coefficient mean–13ppm/°C
(1) Electrical Characteristics values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the device can be permanently degraded, either mechanically or electrically.
(2) Register values are represented as either binary (b is the prefix to the digits), or hexadecimal (0x is the prefix to the digits). Decimal values have no prefix.
(3) Limits are ensured by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method.
(4) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values can vary over time and also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(5) I2C read/write communication and pullup resistors current through SCL, SDA not included.
(6) Sensor capacitor: 1 layer, 20.9 x 13.9mm, Bourns CMH322522-180KL sensor inductor with L=18µH and 33pF 1% COG/NP0 Target: Grounded aluminum plate (176 x 123mm), Channel = Channel 0 (continuous mode) CLKIN = 40MHz, CHx_FIN_SEL = b10, CHx_FREF_DIVIDER = b00 0000 0001 CH0_RCOUNT = 0xFFFF, SETTLECOUNT_CH0 = 0x0100, DRIVE_CURRENT_CH0 = 0x7800.
(7) Lower VSENSORMIN oscillation amplitudes can be used, but will result in lower SNR.