SLAS828F February   2012  – July 2018 HD3SS3412

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      HD3SS3412 Pinout
      2.      HD3SS3412 Switch Flow Through Routing
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 AC Coupling Caps
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

RUA Package
42-Pin WQFN
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
SWITCH PORT A
A0+ 2 I/O Port A, Channel 0, High-Speed Positive Signal
A0– 3 I/O Port A, Channel 0, High-Speed Negative Signal
A1+ 6 I/O Port A, Channel 1, High-Speed Positive Signal
A1– 7 I/O Port A, Channel 1, High-Speed Negative Signal
A2+ 11 I/O Port A, Channel 2, High-Speed Positive Signal
A2– 12 I/O Port A, Channel 2, High-Speed Negative Signal
A3+ 15 I/O Port A, Channel 3, High-Speed Positive Signal
A3– 16 I/O Port A, Channel 3, High-Speed Negative Signal
SWITCH PORT B
B0+ 38 I/O Port B, Channel 0, High-Speed Positive Signal
B0– 37 I/O lPort B, Channel 0, High-Speed Negative Signal
B1+ 36 I/O Port B, Channel 1, High-Speed Positive Signal
B1– 35 I/O Port B, Channel 1, High-Speed Negative Signal
B2+ 29 I/O Port B, Channel 2, High-Speed Positive Signal
B2– 28 I/O Port B, Channel 2, High-Speed Negative Signal
B3+ 27 I/O Port B, Channel 3, High-Speed Positive Signal
B3– 26 I/O Port B, Channel 3, High-Speed Negative Signal
SWITCH PORT C
C0+ 34 I/O Port C, Channel 0, High-Speed Positive Signal
C0– 33 I/O Port C, Channel 0, High-Speed Negative Signal
C1+ 32 I/O Port C, Channel 1, High-Speed Positive Signal
C1– 31 I/O Port C, Channel 1, High-Speed Negative Signal
C2+ 25 I/O Port C, Channel 2, High-Speed Positive Signal
C2– 24 I/O Port C, Channel 2, High-Speed Negative Signal
C3+ 23 I/O Port C, Channel 3, High-Speed Positive Signal
C3– 22 I/O Port C, Channel 3, High-Speed Negative Signal
CONTROL, SUPPLY, AND NO CONNECT
NC 8 — Electrically not connected. May connect to VDD or GND, or leave unconnected.
18
42
GND 1 Supply Negative power supply voltage
4
10
14
17
19
21
39
41
Center Pad
SEL 9 I Select between port B or port C. Internally tied to GND through a 100-kΩ resistor
VDD 5 Supply Positive power supply voltage
13
20
30
40