SNAS693D July 2017 – February 2021 HDC2010
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
When HL_ENABLE is set and the humidity is over the threshold value program in the Humidity Threshold LOW register the HL_STATUS bit is set to 1. The HL_STATUS bit and the DRDY/INT pin behave based on the INT_POL and INT_MODE bits.
The INT_MODE bit sets the threshold to either comparator mode or a level sensitive alarm.
When INT_MODE is set to 1 the HL_STATUS bit is based on the current humidity conversion. The polarity of the DRDY/INT pin is set by INT_POL.
When INT_MODE is set to 0 the HL_STATUS bit remains set to 1 until it is read. The polarity of the DRDY/INT pin is set by INT_POL.