SNAS817D June 2021 – November 2024 HDC3020-Q1 , HDC3021-Q1 , HDC3022-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Error checking of data is supported with a Checksum Calculation, and the reliability of data communication is supported by sending a checksum byte with every 2 bytes of data. The 8-bit CRC checksum transmitted after each data word is generated by a CRC algorithm. Table 7-1 shows the CRC properties. The CRC covers the contents of the two previously transmitted data bytes. To calculate the checksum, only these two previously transmitted data bytes are used.
A CRC byte is sent by the HDC302x-Q1 to the I2C controller in the following cases:
A CRC byte must be sent by the I2C controller to the HDC302x-Q1 in the following cases:
PROPERTY | VALUE |
---|---|
Name | CRC-8/NRSC-5 |
Width | 8 bit |
Protected Data | Read Data, Write Data, or Both |
Polynomial | 0x31 (x8 + x5 + x4 + 1) |
Initialization | 0xFF |
Reflect Input | False |
Reflect Output | False |
Final XOR | 0x00 |
Examples | CRC of 0xABCD = 0x6F |
Retrieving the CRC byte from the HDC302x-Q1 is required. A NACK cannot be issued by the I2C controller prior to reception of the CRC byte to cancel. Example code with how to calculate CRC along with all other HDC302x communications is available on ASC Studio.