SBOS027C September   2000  – September 2022 INA118

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Noise Performance
      2. 8.4.2 Input Common-Mode Range
      3. 8.4.3 Input Protection
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting the Gain
        2. 9.2.2.2 Dynamic Performance
        3. 9.2.2.3 Offset Trimming
        4. 9.2.2.4 Input Bias Current Return Path
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Low-Voltage Operation
      2. 9.3.2 Single-Supply Operation
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at TA = 25°C, VS = ±15 V (unless otherwise noted)

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Figure 7-1 Gain vs Frequency
  VS = ±15 V
Figure 7-3 Input Common-Mode Range vs Output Voltage
  VS = 5 V
G = 1
Figure 7-5 Input Common-Mode Range vs Output Voltage
 
Figure 7-7 Positive Power Supply Rejection vs Frequency
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Figure 7-9 Input-Referred Noise Voltage vs Frequency
 
Figure 7-11 Quiescent Current and Slew Rate vs Temperature
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Figure 7-13 Offset Voltage vs Warm-Up Time
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Figure 7-15 Output Voltage Swing vs Output Current
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Figure 7-17 Output Current Limit vs Temperature
 
Figure 7-19 THD + N vs Frequency
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Figure 7-21 Small-Signal Response
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Figure 7-23 Large-Signal Response
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Figure 7-2 Common-Mode Rejection vs Frequency
  VS = ±5 V
Figure 7-4 Input Common-Mode Range vs Output Voltage
  VS = 5 V
G = 100
Figure 7-6 Input Common-Mode Range vs Output Voltage
 
Figure 7-8 Negative Power Supply Rejection vs Frequency
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Figure 7-10 Settling Time vs Gain
 
Figure 7-12 Input Bias Current vs Input Overload Voltage
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Figure 7-14 Input Bias and Offset Current vs Temperature
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Figure 7-16 Output Voltage Swing vs Power Supply Voltage
 
Figure 7-18 Maximum Output Swing vs Frequency
  G = 1000
Figure 7-20 Input-Referred Noise, 0.1 Hz to 10 Hz
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Figure 7-22 Small-Signal Response
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Figure 7-24 Large-Signal Response