SBOS501F January   2010  – February 2015 INA128-HT , INA129-HT

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: INA128-HT
    5. 7.5 Electrical Characteristics: INA128-HT
    6. 7.6 Electrical Characteristics: INA129-HT
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Noise Performance
      2. 8.4.2 Input Common-Mode Range
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting the Gain
        2. 9.2.2.2 Dynamic Performance
        3. 9.2.2.3 Offset Trimming
        4. 9.2.2.4 Input Bias Current Return Path
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Low Voltage Operation
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Related Links
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

D, HKJ, or JDJ Package
8-Pin SOIC, CFP, or CDIP SB
Top View
INA128-HT INA129-HT po1_bos501.gif
HKQ Package
8-Pin CFP
Top View
INA128-HT INA129-HT hkq_po_bos501.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
Ref 5 I Output voltage reference
RG 1, 8 O Gain resistor connection
V+ 7 Power Positive power supply voltage from 2.25 V to 18 V
V– 4 Power Negative power supply voltage from –2.25 V to –18 V
V+IN 3 I Non-inverting input voltage
V–IN 2 I Inverting input voltage
VO 6 O Output voltage

Bare Die Information

DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD
METALLIZATION COMPOSITION
15 mils Silicon with backgrind GND Al-Si-Cu (0.5%)
INA128-HT INA129-HT bondpad_bas446a.gif

Bond Pad Coordinates in Mils

DESCRIPTION PAD NUMBER a b c d
NC 1 –57.4 –31.1 –53.3 –27
V-IN 2 –9.85 –31.4 –5.75 –27.3
V+IN 3 25.05 –31.4 29.15 –27.3
V- 4 56.2 –34.3 60.3 –30.2
Ref 5 53.75 –17.6 57.85 –11
VO 6 50.35 27.8 56.95 31.9
V+ 7 7.75 30.2 11.85 34.3
NC 8 –57.4 28.4 –53.3 32.5
RG(1) 9 –57.4 13.4 –53.3 20
RG(1) 10 –57.5 2.7 –53.4 9.3
RG(1) 11 –57.5 –7.9 –53.4 –1.3
RG(1) 12 –57.4 –18.6 –53.3 –12
(1) Pads 9 and 10 must both be bonded to a common point and correspond to package pin 8. Pads 11 and 12 must both be bonded to a common point and correspond to package pin 1.
INA128-HT INA129-HT die_bos501.gif