SBOS109A September   1999  – November 2023 INA146

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = ±2.25 V to ±18 V
    6. 5.6 Electrical Characteristics VS = 5 V Single Supply
    7. 5.7 Amplifier A1, A2 Performance
    8. 5.8 Typical Performance Curves
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Operating Voltage
      2. 6.1.2 Setting the Gain
      3. 6.1.3 Common-mode Range
      4. 6.1.4 Offset Trim
      5. 6.1.5 Input Impedance
  8. 7Device and Documentation Support
    1. 7.1 Third-Party Products Disclaimer
    2. 7.2 Documentation Support
      1. 7.2.1 Related Documentation
    3. 7.3 Receiving Notification of Documentation Updates
    4. 7.4 Support Resources
    5. 7.5 Trademarks
    6. 7.6 Electrostatic Discharge Caution
    7. 7.7 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics VS = ±2.25 V to ±18 V

at TA = 25°C, VS = ±2.25 V to ±18 V, RL = 10 kΩ, VREF = 0 V, VCM = VS / 2, and G = 0.1 (unless otherwise noted)
PARAMETER TEST CONDITIONS TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VOS Offset voltage, VO   RTI, VS = ±15 V, VCM = 0 V ±1 ±5 mV
Offset voltage, VO1 RTI ±1 mV
Offset voltage drift  RTI, TA = –40℃ to 85℃ ±10 µV/°C
PSRR Power-supply rejection ratio  RTI, VS =  ±1.35 V to ±18 V ±100 ±600 µV/V
VCM Common-mode voltage (1) VS = ±15 V, VIN = 0 V –100 100 V
CMRR Common-mode voltage rejection RTI,  11 (–VS) < VCM < 11 (VS -1) , RS = 0 Ω 70 80 dB
TA = –40℃ to 85℃ 64 74
Differential input impedance Non-inverting input 110 kΩ
Inverting input 91.7
Common-mode input impedance 55 kΩ
BIAS CURRENT
IB Bias Current VCM = VS / 2 ±50 nA
IOS Offset Current ±5 nA
NOISE
eN Voltage noise RTI, fB = 0.1 Hz to 10 Hz 12 µVPP 
RTI, f = 1 kHz 550 nV/√Hz
GAIN
Gain  0.1 100 V/V
GE Gain error VO = (V–) + 0.15 V to (V+) – 1 V, RL = 100 kΩ, G = 1 ±0.025 ±0.1 %
VO = (V–) + 0.3 V to (V+) – 1.25 V, RL = 10 kΩ, G = 1 ±0.025 ±0.1
Gain error drift(2) TA = –40°C to 85°C  VO = (V–) + 0.25 V to (V+) – 1 V, RL = 100 kΩ, G = 1 ±1 ±10 ppm/°C
VO = (V–) + 0.5 V to (V+) – 1.25 V, RL = 10 kΩ, G = 1 ±1 ±10
Gain nonlinearity VO = (V–) + 0.3 V to (V+) – 1.25 V, G = 1 ±0.001 ±0.01 % of FSR
OUTPUT
Output voltage RL = 100 kΩ, G = 1 (V–) + 0.15 (V+) – 1 V
TA = –40℃ to 85℃  (V–) + 0.25 (V+) – 1
RL = 10 kΩ, G = 1 (V–) + 0.3 (V+) – 1.25
TA = –40℃ to 85℃ (V–) + 0.5 (V+) – 1.25
CL Load capacitance Stable operation 1 nF
ISC Short-circuit current Continuous to VS / 2 ±15 mA
FREQUENCY RESPONSE
BW Bandwidth, –3 dB G = 0.1 550 kHz
G = 1 50
SR Slew rate 0.3 V/µs
tS Settling time To 0.1%,  VO = 10 V-step 40 µs
To 0.01% VO = 10 V-step 80
Overload recovery 50% input overload 40 µs
POWER SUPPLY
IQ Quiescent current VIN = 0 V ±570 ±700 µA
TA = –40℃ to 85℃ ±750
(1) Input common-mode voltage varies with output voltage; see Typical Characteristics.
(2) Specified by wafer test.