SBOSA08
February 2021
INA183
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Single-Supply Operation from IN+
8.3.2
Low Gain Error and Offset Voltage
8.3.3
Low Drift Architecture
8.4
Device Functional Modes
8.4.1
Normal Operation
8.4.2
Unidirectional, High-Side Operation
8.4.3
Input Differential Overload
9
Application and Implementation
9.1
Application Information
9.1.1
RSENSE and Device Gain Selection
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbosa08_oa
sbosa08_pm
7.6
Typical Characteristics
T
A
= 25 °C, V
S
= V
IN+
= 12 V (unless otherwise noted)
Figure 7-1
Input Offset Voltage Production Distribution
Figure 7-3
Common-Mode Rejection Production Distribution (A1 Devices)
Figure 7-5
Common-Mode Rejection Production Distribution (A3 Devices)
Figure 7-7
Gain Error Production Distribution (A1 Devices)
Figure 7-9
Gain Error Production Distribution (A3 Devices)
Figure 7-11
Gain vs. Frequency
Figure 7-13
Output Voltage Swing vs. Output Current
Figure 7-15
Input Bias Current vs. Temperature
Figure 7-17
Input-Referred Voltage Noise vs. Frequency
Figure 7-19
Step Response (10-mV
PP
Input Step)
Figure 7-21
Inverting Differential Input Overload
Figure 7-23
Brownout Recovery
Figure 7-2
Offset Voltage vs. Temperature
Figure 7-4
Common-Mode Rejection Production Distribution (A2 Devices)
Figure 7-6
Common-Mode Rejection Ratio vs. Temperature
Figure 7-8
Gain Error Production Distribution (A2 Devices)
Figure 7-10
Gain Error vs. Temperature
Figure 7-12
Common-Mode Rejection Ratio vs. Frequency
Figure 7-14
Input Bias Current vs. Common-Mode Voltage
Figure 7-16
Quiescent Current vs. Temperature
Figure 7-18
0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
Figure 7-20
Common-Mode Voltage Transient Response
V
DIFF
= 0 V
V
CM
= 12-V Pulse
Figure 7-22
Start-Up Response