SLOS785B June   2012  – March 2016 INA220-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Related Products
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Basic ADC Functions
        1. 8.3.1.1 Power Measurement
        2. 8.3.1.2 PGA Function
    4. 8.4 Device Functional Modes
      1. 8.4.1 Filtering and Input Considerations
    5. 8.5 Programming
      1. 8.5.1 Programming the INA220-Q1 Calibration Register
      2. 8.5.2 Programming the INA220-Q1 Power Measurement Engine
        1. 8.5.2.1 Calibration Register and Scaling
      3. 8.5.3 Simple Current Shunt Monitor Usage (No Programming Necessary)
      4. 8.5.4 Bus Overview
        1. 8.5.4.1 Serial Bus Address
        2. 8.5.4.2 Serial Interface
      5. 8.5.5 Writing to and Reading from the INA220-Q1
        1. 8.5.5.1 High-Speed Mode
        2. 8.5.5.2 Power-Up Conditions
    6. 8.6 Register Maps
      1. 8.6.1 Register Information
      2. 8.6.2 Register Details
        1. 8.6.2.1 Configuration Register (address = 00h) [reset = 399Fh]
      3. 8.6.3 Data Output Registers
        1. 8.6.3.1 Shunt Voltage Register (address = 01h)
        2. 8.6.3.2 Bus Voltage Register (address = 02h)
        3. 8.6.3.3 Power Register (address = 03h) [reset = 00h]
        4. 8.6.3.4 Current Register (address = 04h) [reset =00h]
      4. 8.6.4 Calibration Register
        1. 8.6.4.1 Calibration Register (address = 05h) [reset = 00h]
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Register Results for the Example Circuit
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VS Supply voltage 6 V
Analog inputs
IN+, IN–		 Differential (VIN+) – (VIN–)(2) –26 26 V
Common-mode (VIN+ + VIN-) / 2 –0.3 26 V
VVBUS Voltage at VBUS pin –0.3 26 V
VSDA Voltage at SDA pin GND – 0.3 6 V
VSCL Voltage at SCL pin GND – 0.3 VS + 0.3 V
Input current into any pin 5 mA
Open-drain digital output current 10 mA
Operating temperature –40 125 °C
TJ Junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) IN+ and IN– may have a differential voltage of –26 to 26 V; however, the voltage at these pins must not exceed the range of –0.3 to 26 V.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 ±750 V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VCM (VIN+ + VIN-) / 2 12 V
VS Supply voltage 3.3 V
TA Ambient temperature –25 85 ºC

7.4 Thermal Information

THERMAL METRIC(1) INA220-Q1 UNIT
DGS (10 PINS)
RθJA Junction-to-ambient thermal resistance 165.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 53.2 °C/W
RθJB Junction-to-board thermal resistance 86.6 °C/W
ψJT Junction-to-top characterization parameter 6.4 °C/W
ψJB Junction-to-board characterization parameter 85 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

at TA = 25°C, VS = 3.3 V, VIN+ = 12 V, VSHUNT = (VIN+ – VIN–) = 32 mV, VVBUS = 12 V, PGA = /1, and BRNG(1) = 1, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VSHUNT Full-scale current sense (input) voltage range PGA = /1 0 ±40 mV
PGA = /2 0 ±80 mV
PGA = /4 0 ±160 mV
PGA = /8 0 ±320 mV
Bus voltage (input voltage)(2) BRNG = 1 0 32 V
BRNG = 0 0 16 V
Common-mode rejection VIN+ = 0 to 26 V 100 120 dB
VOS Offset voltage, RTI(3) PGA = /1 ±10 ±50 μV
PGA = /2 ±20 ±75 μV
PGA = /4 ±30 ±75 μV
PGA = /8 ±40 ±100 μV
TA = –40°C to 85°C 0.16 μV/°C
PSRR Offset voltage versus power supply, RTI(3) VS = 3 to 5.5 V 10 μV/V
Current sense gain error ±40 m%
TA = –40°C to 85°C 1 m%/°C
IIN+, IIN– Input bias current at IN+ and IN– Active mode 20 μA
VBUS pin input impedance(5) Active mode 320 kΩ
IN+ pin input leakage(4) Power-down mode 0.1 ±0.5 μA
IN– pin input leakage(4) Power-down mode 0.1 ±0.5 μA
DC ACCURACY
ADC basic resolution 12 bits
Shunt voltage 1-LSB step size 10 μV
Bus voltage 1-LSB step size 4 mV
Current measurement error ±0.2% ±0.3%
TA = –40°C to 85°C ±0.5%
Bus voltage measurement error VBUS = 12 V ±0.2% ±0.5%
TA = –40°C to 85°C ±1%
Differential nonlinearity ±0.1 LSB
ADC TIMING
ADC conversion time 12-bit 532 586 μs
11-bit 276 304 μs
10-bit 148 163 μs
9-bit 84 93 μs
Minimum convert input low time 4 μs
SMBus
SMBus timeout(6) 28 35 ms
DIGITAL INPUTS (SDA as Input, SCL, A0, A1)
Input capacitance 3 pF
Leakage input current 0 ≤ VIN ≤ VS 0.1 1 μA
VIH Input logic-level high 0.7 (VS) 6 V
VIL Input logic-level low –0.3 0.3 (VS) V
Hysteresis 500 mV
OPEN-DRAIN DIGITAL OUTPUTS (SDA)
Logic 0 output level ISINK = 3 mA 0.15 0.4 V
High-level output leakage current VOUT = VS 0.1 1 μA
POWER SUPPLY
Operating supply range 3 5.5 V
Quiescent current 0.7 1 mA
Quiescent current, power-down mode 6 15 μA
Power-on reset threshold 2 V
(1) BRNG is bit 13 of the Configuration Register 00h (see Figure 19).
(2) This parameter only expresses the full-scale range of the ADC scaling. In no event should more than 26 V be applied to this device.
(3) Referred-to-input (RTI)
(4) Input leakage is positive (current flowing into the pin) for the conditions shown at the top of the table. Negative leakage currents can occur under different input conditions.
(5) The input impedance of this pin may vary approximately ±15%.
(6) SMBus timeout in the INA220-Q1 resets the interface any time SCL or SDA is low for more than 28 ms.

7.6 Typical Characteristics

at TA = 25°C, VS = 3.3 V, VIN+ = 12 V, VSHUNT = (VIN+ – VIN–) = 32 mV, PGA = /1, and BRNG = 1, unless otherwise noted.
INA220-Q1 tc_frq_resp_bos459.gif
Figure 1. Frequency Response
INA220-Q1 tc_shunt_g-tmp_bos459.gif
Figure 3. ADC Shunt Gain Error vs Temperature
INA220-Q1 tc_bus_g-tmp_bos459.gif
Figure 5. ADC Bus Gain Error vs Temperature
INA220-Q1 tc_in_curr_v_bos459.gif
Figure 7. Input Currents With Large Differential Voltages (VIN+ at 12 V, Sweep Of VIN–)
INA220-Q1 tc_shutdwn-tmp_bos459.gif
Figure 9. Shutdown IQ vs Temperature
INA220-Q1 tc_total_bus_error_v_vsup_bos459.gif
Figure 11. Total Percent Bus Voltage Error
vs Supply Voltage
INA220-Q1 tc_shunt_off-tmp_bos459.gif
Figure 2. ADC Shunt Offset vs Temperature
INA220-Q1 tc_bus_off-tmp_bos459.gif
Figure 4. ADC Bus Voltage Offset vs Temperature
INA220-Q1 tc_inl-vin_bos459.gif
Figure 6. Integral Nonlinearity vs Input Voltage
INA220-Q1 tc_iq-tmp_bos459.gif
Figure 8. Active IQ vs Temperature
INA220-Q1 tc_iq-i2c_bos459.gif
Figure 10. Active IQ vs Clock Frequency
INA220-Q1 tc_shutdwn-frq_bos459.gif
Figure 12. Shutdown IQ vs Clock Frequency