SBOS601A February 2012 – December 2021 INA230
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
BIT # | D15 | D14 | D13 | D12 | D11 | D10 | D9 | D8 | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
BIT NAME | RST | — | — | — | AVG2 | AVG1 | AVG0 | VBUSCT2 | VBUSCT1 | VBUSCT0 | VSHCT2 | VSHCT1 | VSHCT0 | MODE3 | MODE2 | MODE1 |
POR VALUE | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 |
The Configuration register settings control the operating modes for the INA230. This register controls the conversion time settings for both the shunt and bus voltage measurements, as well as the averaging mode used. The operating mode that controls which signals are selected to be measured is also programmed in the Configuration register.
The Configuration register can be read from at any time without impacting or affecting the device settings or a conversion in progress. Writing to the Configuration register halts any conversion in progress until the write sequence is complete, resulting in the start of a new conversion based on the new contents of the Configuration register. This feature prevents any uncertainty in the conditions used for the next completed conversion.
RST: | Reset Bit |
Bit 15 | Setting this bit to '1' generates a system reset that is the same as a power-on reset; all registers are reset to default values. This bit self-clears. |
AVG: | Averaging Mode |
Bits 9–11 | Sets the number of samples that are collected and averaged together. Table 8-5 summarizes the AVG bit settings and related number of averages for each bit. |