Table 1. Telemetry and Warning Conversion Coefficients (R_S in mΩ)

7.5.4.1 Writing Telemetry Data and Warning Thresholds

There are several PMBus commands that require writing telemetry data in order to be used. Use the same coefficients previously calculated for the application and apply these coefficients using Equation 4.

7.5.6.1 Serial Bus Address

To communicate with the INA233, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits and a direction bit that indicates whether the action is to be a read or write operation.

The device has two address pins, A0 and A1. Table 2 lists the pin logic levels for each of the 16 possible addresses. The device samples the state of the A0 and A1 pins on every bus communication. Establish the pin states before any activity on the interface occurs.

7.5.6.2 Serial Interface

The INA233 operates only as a slave device on both the I²C bus and the SMBus. Connections to the bus are made via the open-drain SDA and SCL lines. The SDA and SCL pins feature integrated spike-suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. Although the device integrates spike suppression into the digital I/O lines, proper layout techniques help minimize the amount of coupling into the communication lines. This noise introduction can occur from capacitively coupling signal edges between the two communication lines themselves or from other switching noise sources present in the system. Routing traces in parallel with ground in between layers on a printed circuit board (PCB) typically reduces the effects of coupling between the communication lines. Shielded communication lines reduce the possibility of unintended noise coupling into the digital I/O lines that can be incorrectly interpreted as START or STOP commands.

All data bytes are transmitted least significant byte first.

7.5.6.3 Writing to and Reading From the INA233

Both writing and reading to the INA233 is accomplished through the use of various PMBus commands. Each PMBus command code is an address that allows read or write access to the internal registers; see the PMBus Command Support section for a complete list of supported PMBus commands and corresponding addresses. The value for the command address is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the device requires a value for the command address.

Writing to the device begins with the first byte transmitted by the master. This byte is the slave address with the R/W bit low. The device then acknowledges receipt of a valid address. The next byte transmitted by the master is the PMBus command address to the register that data are written to. This command address value updates the register pointer to the desired register. The next two bytes are written to the register addressed by the PMBus command. The device acknowledges receipt of each data byte. The master can terminate data transfer by generating a START or STOP condition.

The timing structure for SEND BYTE commands is the same as WRITE WORD commands except no data packets are sent.

When reading from the device, first the device is written to with the desired PMBus command that is to return the desired value. This write is accomplished by issuing a slave address byte with the R/W bit low, followed by the PMBus command code. No additional data are required. The master then generates a repeated START condition and sends the slave address byte with the R/W bit high to initiate the read command. The next byte is transmitted by the slave and is the most significant byte of the register indicated by the register pointer. This byte is followed by an Acknowledge (ACK) from the master; then the slave transmits the least significant byte. The master acknowledges receipt of the data byte. The master can terminate data transfer by generating a Not-Acknowledge after receiving any data byte, or by generating a START or STOP condition. If repeated reads from the same register are desired, the register pointer bytes do not have to be continually sent; the device retains the register pointer value until the value is changed by the next write operation.

The READ BYTE format has the same timing structure as the READ WORD format except a byte of data is returned instead of a word.

Figure 26 shows the write operation timing diagram. Figure 27 shows the read operation timing diagram.

1. The value of the slave address byte is determined by the settings of the A0 and A1 pins; see Table 2.

Figure 26. Timing Diagram for Write Word Format

1. The value of the slave address byte is determined by the settings of the A0 and A1 pins; see Table 2.

2. Read data are from the previous PMBus command code.

3. An Acknowledge by the master can also be sent.

Figure 27. Timing Diagram for Read Word Format

A block read is similar to the read word format in that first the device is written to with the desired PMBus command that is to return the desired value. This write is accomplished by issuing a slave address byte with the R/W bit low, followed by the PMBus command code. The master then generates a repeated START condition and sends the slave address byte with the R/W bit high to initiate the read command. The next byte is transmitted by the slave is the total number of bytes that are sent to the master. This byte is followed by an Acknowledge (ACK) from the master; then the slave transmits the first data byte. At the end of each byte the master sends an Acknowledge and the next byte is sent by the slave. The master can terminate data transfer by generating a Not-Acknowledge after receiving any data byte, or by generating a START or STOP condition.

Figure 28 shows the block read operation timing diagram. Figure 29 shows the timing diagram for the SMBus Alert response operation.

A. The value of the slave address byte is determined by the settings of the A0 and A1 pins; see Table 2.

Figure 28. Timing Diagram for Block Read Format

1. The value of the slave address byte is determined by the settings of the A0 and A1 pins; see Table 2.

Figure 29. Timing Diagram for SMBus ALERT Response

7.5.6.3.2 Bus Timing Requirements

When the bus is idle, both the SDA and SCL lines are pulled high by the pullup resistors. The master generates a START condition followed by a valid serial byte containing high-speed (HS) master code 00001XXX. This transmission can be made at 400-kHz data rates. Figure 30 shows a timing diagram for the bus and Table 3 lists the bus timing definitions.

Figure 30. Bus Timing Diagram

Table 3. Bus Timing Definitions⁽¹⁾

		MIN	MAX	UNIT
f(SCL)	SCL operating frequency	10	400	kHz
t(BUF)	Bus free time between STOP and START conditions	0.6		µs
t(HDSTA)	Hold time after a repeated START condition. After this period, the first clock is generated.	0.6		µs
t(SUSTA)	Repeated START condition setup time	0.6		µs
t(SUSTO)	STOP condition setup time	0.6		µs
t(HDDAT)	Data hold time	0		ns
t(SUDAT)	Data setup time	100		ns
t(LOW)	SCL clock low period	1.3		µs
t(HIGH)	SCL clock high period	0.6	50	µs
tF	Data fall time		300	ns
tF	Clock fall time		300	ns
tR	Clock rise time		300	ns

(1) Values are based on a statistical analysis of a one-time sample of devices. Minimum and maximum values are not specified and are not production tested.

7.5.6.4 SMBus Alert Response

When SMBus alerts are latched, the INA233 is designed to respond to the SMBus alert response address. The SMBus alert response provides a quick fault identification for simple slave devices. When an alert occurs, the master can broadcast the alert response slave address (0001 100) with the R/W bit set high. Following this alert response, any slave device that generates an alert is identified by acknowledging the alert response and sending its address on the bus.

The alert response can activate several different slave devices simultaneously, similar to the I²C general call. If more than one slave attempts to respond, bus arbitration rules apply and the device with the lowest address wins and is serviced first. The losing devices do not generate an Acknowledge and continue to hold the alert line low until the interrupt is cleared. The winning device responds with its address and releases the SMBus alert line. Even though the INA233 releases the SMBus line, the internal error flags are not cleared until done so by the host.

Table 4. Supported PMBus Commands

7.6.2.1 CLEAR_FAULTS (03h)

CLEAR_FAULTS is a standard PMBus command that resets all stored warning and fault flags and the alert signal. If a fault or warning condition still exists when the CLEAR_FAULTS command is issued, the ALERT signal clears but reasserts almost immediately. This command uses the PMBus send byte protocol.

7.6.2.2 RESTORE_DEFAULT_ALL (12h)

The RESTORE_DEFAULT_ALL command restores the internal device register settings to the default values.

7.6.2.3 CAPABILITY (19h)

The CAPABILITY command is a standard PMBus command that returns information about the PMBus functions supported by the INA233. This command is read with the PMBus read byte protocol.

7.6.2.4 IOUT_OC_WARN_LIMIT (4Ah) [default = 01111111 11111000]

This command is an overcurrent warn limit. This standard PMBus command is used to set or read the threshold of the first level warning of high output currents. Use the PMBus read or write word protocol to access this command. The contents of the IOUT_OC_WARN_LIMIT register are compared to the current-sense ADC telemetry value to detect high output current. This warning threshold applies to both positive and negative currents.

Enter the value in the register in amps with the same scaling and coefficients used for reading current.

When this input overcurrent warning limit is exceeded, the device:

• Sets the NONE OF THE ABOVE bit in the STATUS_BYTE register
• Sets the IOUT bit in the STATUS_WORD register
• Sets the IOUT_OC_WARNING bit in the STATUS_IOUT register
• Sets the INPUT bit in the STATUS_WORD register
• Sets the IIN_OC_WARNING bit in the STATUS_INPUT register
• Notifies (if unmasked) the host using the ALERT pin

This warning is masked with the MFR_ALERT_MASK command with the IIN_OC_WARN bit.

See the Reading and Writing Telemetry Data and Warning Thresholds and Writing Telemetry Data and Warning Thresholds sections for additional information on reading and setting warning thresholds.

7.6.2.5 VIN_OV_WARN_LIMIT (57h) [default = 01111111 11111000]

VIN_OV_WARN_LIMIT is a standard PMBus command that allows configuring or reading the threshold for a VBUS overvoltage warning detection. Use the coefficients listed in Table 1 when reading and writing to this register. Use the PMBus read or write word protocol to access this command.

When this input overvoltage warning limit is exceeded, the device:

• Sets the NONE OF THE ABOVE bit in the STATUS_BYTE register
• Sets the INPUT bit in the STATUS_WORD register
• Sets the IOUT_OC_WARNING bit in the STATUS_INPUT register
• Notifies (if unmasked) the host using the ALERT pin

This fault is masked with the MFR_ALERT_MASK command using the VIN_OV_WARNING

See the Reading and Writing Telemetry Data and Warning Thresholds and Writing Telemetry Data and Warning Thresholds sections for additional information on reading and setting warning thresholds.

Full-scale range = 40.96 V (7FFFh) and LSB = 1.25 mV.

7.6.2.6 VIN_UV_WARN_LIMIT (58h) [default = 00000000 00000000]

VIN_UV_WARN_LIMIT is a standard PMBus command that allows configuring or reading the threshold for the VBUS undervoltage warning detection. Use the coefficients listed in Table 1 when reading and writing to this register. Use the PMBus read or write word protocol to access this command.

When this input undervoltage warning limit is exceeded, the device:

• Sets the NONE OF THE ABOVE bit in the STATUS_BYTE register
• Sets the INPUT bit in the STATUS_WORD register
• Sets the VIN_UV_WARNING bit in the STATUS_INPUT register
• Notifies (if unmasked) the host using the ALERT pin

This fault is masked with the MFR_ALERT_MASK command using the VIN_UV_WARNING bit.

See the Reading and Writing Telemetry Data and Warning Thresholds and Writing Telemetry Data and Warning Thresholds sections for additional information on reading and setting warning thresholds.

Full-scale range = 40.96 V (7FFFh) and LSB = 1.25 mV.

7.6.2.7 PIN_OP_WARN_LIMIT (6Bh) [default = 11111111 11110000]

PIN_OP_WARN_LIMIT is a standard PMBus command that allows setting or reading the threshold for the input overpower warning. Use the PMBus read or write word protocol to access the POUT_OP_WARN_LIMIT command. The contents of this register are compared to the calculated telemetry power value.

When the PIN_OP_WARN_LIMIT is exceeded, the device:

• Sets the INPUT bit in the upper byte of the STATUS_WORD register
• Sets the PIN_OP_WARNING bit in the STATUS_INPUT register
• Notifies the host by asserting the ALERT pin

This warning is masked with the MFR_ALERT_MASK command using the IIN_OP_WARNING bit.

7.6.2.8 STATUS_BYTE (78h)

STATUS_BYTE is a standard PMBus command that returns the value of a number of flags indicating the state of the INA233. Use the PMBus read byte protocol to access this command. To clear bits in this register, clear the underlying fault and issue a CLEAR_FAULTS command. Table 10 lists the definitions for this command.

NONE OF THE ABOVE (bit 0) is set by the logical OR of the following status bits from other registers:

• IOUT_OC_WARNING
• VIN_OV_WARNING
• VIN_UV_WARNING
• IIN_OC_WARNING

This bit can only be cleared by clearing all the contributing status bits.

7.6.2.9 STATUS_WORD (79h)

STATUS_WORD is a standard PMBus command that returns the value of a number of flags indicating the state of the INA233. Use the PMBus read word protocol to access this command. To clear bits in this register, clear the underlying fault and issue a CLEAR_FAULTS command. The INPUT and VIN UV flags default to 1 on startup. Table 11 lists the definitions for this command.

7.6.2.10 STATUS_IOUT (7Bh)

STATUS_IOUT is a standard PMBus command that returns the value of the of a number of flags related to output, current, and power. Use the PMBus read byte protocol to access this command. To clear bits in this register, clear the underlying fault and issue a CLEAR_FAULTS command or write a 1 to the bit to be cleared. Table 12 lists the definitions for this command.

7.6.2.11 STATUS_INPUT (7Ch)

STATUS_INPUT is a standard PMBus command that returns the value of the of a number of flags related to input voltage, current, and power. Use the PMBus read byte protocol to access this command. To clear bits in this register, clear the underlying fault and issue a CLEAR_FAULTS command or write a 1 to the bit to be cleared. Table 13 lists the definitions for this command.

7.6.2.12 STATUS_CML (7Eh)

STATUS_CML is a standard PMBus command that returns the value of a number of flags related to communication faults. Use the PMBus read byte protocol to access this command. To clear bits in this register, issue a CLEAR FAULTS command or write a 1 to the bit to be cleared. Table 14 lists the definitions for this command.

7.6.2.13 STATUS_MFR_SPECIFIC (80h)

STATUS_MFR_SPECIFIC is a standard PMBus command that contains manufacturer-specific status information. Use the PMBus read byte protocol to access this command. To clear bits in this register, clear the underlying fault and issue a CLEAR_FAULTS command or write a 1 to the bit to be cleared. Table 15 lists the definitions for this command.

7.6.2.14 READ_EIN (86h)

READ_EIN is a command that returns information that the host can use to calculate energy or to average input power consumption. Use the PMBus block read protocol to access this command. Six bytes of data are returned by this command. The first two bytes are the 16-bit, unsigned output of an accumulator that continuously sums samples of the instantaneous input power. These two data bytes are formatted such that returned values can be converted to watts using the power m, b, and R coefficients. The third data byte is a count of the rollover events for the accumulator. This byte is an unsigned integer indicating the number of times that the accumulator has rolled over from the maximum positive value (FFFFh) to zero. The last three data bytes are a 24-bit unsigned integer that counts the number of samples of the instantaneous input power that are applied to the accumulator.

The combination of the accumulator and the rollover count can overflow within a few seconds depending on the ADC conversion time. The host software must detect and appropriately handle this overflow. Similarly, the sample count value overflows, but this event only occurs one time every few hours using 1-ms ADC conversion times.

To convert the data obtained with the READ_EIN command to average power, first convert the accumulator and rollover count to an unsigned integer.

Total Accumulated Unscaled Power (Accumulator_24) = (rollover_count × 2¹⁶) + Accumulator

Overflow detection and handling are done on the 24 bits of accumulator data and the sample count now. As shown in Equation 6, data from the previous calculation must be saved and used in this calculation to obtain the unscaled average power. Table 16 lists the definitions for this command.

Equation 6.

where

• accumulator_24 [n] = Overflow corrected, 24-bit accumulator data from this read
• Sample_count [n] = Sample count data from this read
• accumulator_24[n-1] = Overflow corrected 24-bit accumulator data from the previous read Sample_count [n-1] = Sample count data from the previous read
• Unscaled average power is now in the same units as the data from the READ_PIN command
• PMBus coefficients are used to convert the unscaled average power to watts

When the average power is calculated over a known number of samples, energy can be calculated by taking the product of the average power and the time interval for that average. The time interval can be externally measured or calculated by multiplying the number of samples reported by the ADC conversion time inclusive of any device averaging modes. However, calculating the energy consumption using the ADC conversion time results in a 10% error in the energy reading because of variations in the internal sampling oscillator. For increased precision in the energy measurement, using a higher accuracy external time measurement method is recommended.

The energy accumulator can be configured by the MFR_DEVICE_CONFIG command to automatically clear with each READ_EIN command. The ability to clear the accumulator on a read permits the device to be easily synchronised to an external timer and allows the accumulator to always start at 0, thus eliminating the need to subtract the initial accumulated values and sample counts.

The READ_EIN power accumulator can also be cleared by issuing a CLEAR_EIN command or RESTORE_DEFAULTS_ALL command. Clearing the power accumulator with the RESTORE_DEFAULTS_ALL command is not recommended because this command also clears the calibration register used to scale the accumulated power.

7.6.2.15 READ_VIN (88h)

READ_VIN is a standard PMBus command that returns the 16-bit measured value of the input voltage as read from the VBUS pin. Use the coefficients listed in Table 1 to read this register. Use the PMBus read word protocol to access this command. This value is also used internally for the VIN_OV_WARN and VIN_UV_WARN detection.

Full-scale range = 40.96 V (7FFFh) and LSB = 1.25 mV.

7.6.2.16 READ_IIN (89h)

READ_IN is a standard PMBus command that returns the 16-bit signed value of the sensed current. Use the PMBus read word protocol to access this command. This value is also used internally for the IOUT_OC_WARN detection.

If averaging is enabled, this register displays the averaged value. The value returned by the READ_IIN command is calculated by multiplying the decimal value in the READ_VHSUNT_OUT register with the decimal value of the MFR_CALIBRATION register.

7.6.2.17 READ_VOUT (8Bh)

This command is a mirror of the READ_VIN command supported for cases where VBUS is connected to the output.

7.6.2.18 READ_IOUT (8Ch, R)

This command is a mirror of the READ_IOUT command for software compatibility.

7.6.2.19 READ_POUT (96h, R)

READ_POUT is mirror of the READ_PIN command to support applications that connect the VBUS pin to the output.

7.6.2.20 READ_PIN (97h, R)

READ_PIN is a standard PMBus command that returns the 16-bit measured unsigned absolute value of the input power when VBUS is connected to the input.

Use the PMBus read word protocol to access this command. This value is also used internally for the POUT_OP_WARN detection.

7.6.2.21 MFR_ID (99h)

MFR_ID is a standard PMBus command that returns the identification of the manufacturer. Use the PMBus block read protocol to read the manufacturer ID.

7.6.2.22 MFR_MODEL (9Ah)

MFR_MODEL is a standard PMBus command that returns the part number of the device. Use the PMBus block read protocol to read the manufacturer model.

7.6.2.23 MFR_REVISION (9Bh)

MFR_REVISION is a standard PMBus command that returns the revision level of the device. Use the PMBus block read protocol to read the manufacturer revision.

7.6.3.1 MFR_ADC_CONFIG (D0h) [default = 01000001 00100111]

The MFR_ADC_CONFIG command settings control the operating modes for the device ADC. This command controls the conversion time settings for both the shunt and bus voltage measurements as well as the averaging mode used. The operating mode that controls what signals are selected to be measured is also set with this command. Reading with the MFR_ADC_CONFIG command can be done at any time without affecting the device settings or a conversion in progress. Writing with the MFR_ADC_CONFIG command halts any conversion in progress until the write sequence is completed, resulting in a new conversion starting based on the updated contents. This halt prevents any uncertainty in the conditions used for the next completed conversion.

7.6.3.2 MFR_READ_VSHUNT (D1h) [default = 00000000 00000000]

This register stores the current shunt voltage reading, V_SHUNT. Negative numbers are represented in two's-complement format. Generate the two's complement of a negative number by complementing the absolute value binary number and adding 1. An MSB = 1 denotes a negative number.

If averaging is enabled, this register displays the averaged value. Full-scale range = 81.92 mV (7FFFh) and LSB: 2.5 µV.

This command only supports the PMBus direct data format.

7.6.3.3 MFR_ALERT_MASK (D2h) [default = XXXXXXXX 11110000]

The bits in this register correspond to the bits in the STATUS_MFR_SPECIFIC register. Setting a bit in this register blocks the corresponding bit in the STATUS_MFR_SPECIFIC register from having an effect on the ALERT pin.

7.6.3.4 MFR_CALIBRATION (D4h) [default = 00000000 00000001]

This register provides the device with the value of the shunt resistor that was present to create the measured differential voltage. This register also sets the resolution of the current register. Programming this register sets the Current_LSB and the Power_LSB. This register is also suitable for use in overall system calibration. See the Calibration Register and Scaling section for additional information on programming the calibration register.

The Current_LSB can be used to scale the value in the READ_IOUT register.

7.6.3.5 MFR_DEVICE_CONFIG (D5h) [default = 00000010]

This register configures various behaviors of the device in regards to data communications and alerts.

7.6.3.6 5.1.1 CLEAR_EIN (D6h)

No data are associated with this command.

This register clears the READ_EIN accumulator and counters. One sample of data may be lost.

7.6.3.7 TI_MFR_ID (E0h) [value = 01010100 01001001]

7.6.3.8 TI_MFR_MODEL (E1h) [value = 00110011 00110011]

7.6.3.9 TI_MFR_REVISION (E2h) [value = 01000001 00110000]