The INA237-Q1 is an ultra-precise digital power monitor with a 16-bit delta-sigma ADC specifically designed for current-sensing applications. The device can measure a full-scale differential input of ±163.84 mV or ±40.96 mV across a resistive shunt sense element with common-mode voltage support from –0.3 V to +85 V.
The INA237-Q1 reports current, bus voltage, temperature, and power, all while performing the needed calculations in the background. The integrated temperature sensor is ±1°C accurate for die temperature measurement and is useful in monitoring the system ambient temperature.
The low offset and gain drift design of the INA237-Q1 allows the device to be used in precise systems that do not undergo multi-temperature calibration during manufacturing. Further, the very low offset voltage and noise allow for use in A to kA sensing applications and provide a wide dynamic range without significant power dissipation losses on the sensing shunt element. The low input bias current of the device permits the use of larger current-sense resistors, thus providing accurate current measurements in the micro-amp range.
The device allows for selectable ADC conversion times from 50 µs to 4.12 ms as well as sample averaging from 1x to 1024x, which further helps reduce the noise of the measured data.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
INA237-Q1 | VSSOP (10) | 3.00 mm × 3.00 mm |
Changes from Revision * (June 2020) to Revision A (June 2021)
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | A1 | Digital input | I2C address pin. Connect to GND, SCL, SDA, or VS. |
2 | A0 | Digital input | I2C address pin. Connect to GND, SCL, SDA, or VS. |
3 | ALERT | Digital output | Open-drain alert output, default state is active low. |
4 | SDA | Digital input/output | Open-drain bidirectional I2C data. |
5 | SCL | Digital input | I2C clock input. |
6 | VS | Power supply | Power supply, 2.7 V to 5.5 V. |
7 | GND | Ground | Ground. |
8 | VBUS | Analog input | Bus voltage input. |
9 | IN– | Analog input | Negative input to the device. For high-side applications, connect to load side of sense resistor. For low-side applications, connect to ground side of sense resistor. |
10 | IN+ | Analog input | Positive input to the device. For high-side applications, connect to power supply side of sense resistor. For low-side applications, connect to load side of sense resistor. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VS | Supply voltage | 6 | V | |
VIN+, VIN– (2) | Differential (VIN+) – (VIN–) | –40 | 40 | V |
Common-mode | –0.3 | 85 | V | |
VVBUS | –0.3 | 85 | V | |
VALERT | ALERT | –0.3 | vs. + 0.3 | V |
VIO | SDA, SCL | –0.3 | 6 | V |
IIN | Input current into any pin | 5 | mA | |
IOUT | Digital output current | 10 | mA | |
TJ | Junction temperature | 150 | °C | |
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per AEC Q100-002, all pins(1) HBM ESD Classification Level 2 | ±2000 | V |
Charged device model (CDM), per AEC Q100-011, all pins CDM ESD Classification Level C6 | ±1000 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VCM | Common-mode input range | –0.3 | 85 | V | |
VS | Operating supply range | 2.7 | 5.5 | V | |
TA | Ambient temperature | –40 | 125 | °C |
THERMAL METRIC(1) | INA237-Q1 | UNIT | |
---|---|---|---|
DGS | |||
10 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 177.6 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 66.4 | °C/W |
RθJB | Junction-to-board thermal resistance | 99.5 | °C/W |
ΨJT | Junction-to-top characterization parameter | 9.7 | °C/W |
YJB | Junction-to-board characterization parameter | 97.6 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
INPUT | ||||||
VCM | Common-mode input range | TA = –40 °C to +125 °C | –0.3 | 85 | V | |
VVBUS | Bus voltage input range | 0 | 85 | V | ||
CMRR | Common-mode rejection | –0.3 V < VCM < 85 V, TA = –40 °C to +125 °C | 120 | 140 | dB | |
VDIFF | Shunt voltage input range | TA = –40 °C to +125 °C, ADCRANGE = 0 | –163.84 | 163.84 | mV | |
TA = –40 °C to +125 °C, ADCRANGE = 1 | –40.96 | 40.96 | mV | |||
Vos | Shunt offset voltage | VCM = 0 V | ±15 | ±50 | µV | |
dVos/dT | Shunt offset voltage drift | TA = –40 °C to +125 °C | ±2 | ±20 | nV/°C | |
PSRR | Shunt offset voltage vs. power supply | VS = 2.7 V to 5.5 V, TA = –40 °C to +125 °C | ±0.1 | ±1 | µV/V | |
Vos_bus | VBUS offset voltage | VBUS = 20 mV | ±1 | ±5 | mV | |
dVos/dT | VBUS offset voltage drift | TA = –40 °C to +125 °C | ±20 | ±100 | µV/°C | |
PSRR | VBUS offset voltage vs. power supply | VS = 2.7 V to 5.5 V | ±1.1 | mV/V | ||
IB | Input bias current | Either input, IN+ or IN–, VCM = 85 V | 0.1 | 2.5 | nA | |
ZVBUS | VBUS pin input impedance | Active mode | 0.8 | 1 | 1.2 | MΩ |
IVBUS | VBUS pin leakage current | Shutdown mode, VBUS = 85 V | 10 | nA | ||
RDIFF | Input differential impedance | Active mode, VIN+ – VIN– < 164 mV | 92 | kΩ | ||
DC ACCURACY | ||||||
GSERR | Shunt voltage gain error | ±0.1 | ±0.3 | % | ||
GS_DRFT | Shunt voltage gain error drift | ±50 | ppm/°C | |||
GBERR | VBUS voltage gain error | ±0.1 | ±0.3 | % | ||
GB_DRFT | VBUS voltage gain error drift | ±50 | ppm/°C | |||
PTME | Power total measurment error (TME) | TA = –40 °C to +125 °C, at full scale | ±1.6 | % | ||
ADC resolution | 16 | Bits | ||||
1 LSB step size | Shunt voltage, ADCRANGE = 0 | 5 | µV | |||
Shunt voltage, ADCRANGE = 1 | 1.25 | µV | ||||
Bus voltage | 3.125 | mV | ||||
Temperature | 125 | m°C | ||||
TCT | ADC conversion-time(1) | Conversion time field = 0h | 50 | µs | ||
Conversion time field = 1h | 84 | |||||
Conversion time field = 2h | 150 | |||||
Conversion time field = 3h | 280 | |||||
Conversion time field = 4h | 540 | |||||
Conversion time field = 5h | 1052 | |||||
Conversion time field = 6h | 2074 | |||||
Conversion time field = 7h | 4120 | |||||
INL | Integral Non-Linearity | ±2 | m% | |||
DNL | Differential Non-Linearity | 0.2 | LSB | |||
CLOCK SOURCE | ||||||
FOSC | Internal oscillator frequency | 1 | MHz | |||
FOSC_TOL | Internal oscillator frequency tolerance | TA = 25 °C | ±0.5 | % | ||
TA = –40 °C to +125 °C | ±1 | % | ||||
TEMPERATURE SENSOR | ||||||
Measurement range | –40 | +125 | °C | |||
Temperature accuracy | TA = 25 °C | ±0.15 | ±1 | °C | ||
TA = –40 °C to +125 °C | ±0.2 | ±2 | °C | |||
POWER SUPPLY | ||||||
VS | Supply voltage | 2.7 | 5.5 | V | ||
IQ | Quiescent current | VSENSE = 0 V | 640 | 750 | µA | |
VSENSE = 0 V, TA = –40 °C to +125 °C | 1.1 | mA | ||||
IQSD | Quiescent current, shutdown | Shuntdown mode | 2.8 | 5 | µA | |
TPOR | Device start-up time | Power-up (NPOR) | 300 | µs | ||
From shutdown mode | 60 | |||||
DIGITAL INPUT / OUTPUT | ||||||
VIH | Logic input level, high | SDA, SCL | 1.2 | 5.5 | V | |
VIL | Logic input level, low | GND | 0.4 | V | ||
VOL | Logic output level, low | IOL = 3 mA | GND | 0.4 | V | |
IIO_LEAK | Digital leakage input current | 0 ≤ VIN ≤ VS | –1 | 1 | µA |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
I2C BUS (FAST MODE) | |||||
F(SCL) | I2C clock frequency | 1 | 400 | kHz | |
t(BUF) | Bus free time between STOP and START conditions | 600 | ns | ||
t(HDSTA) | Hold time after a repeated START condition. After this period, the first clock is generated. | 100 | ns | ||
t(SUSTA) | Repeated START condition setup time | 100 | ns | ||
t(SUSTO) | STOP condition setup time | 100 | ns | ||
t(HDDAT) | Data hold time | 10 | 900 | ns | |
t(SUDAT) | Data setup time | 100 | ns | ||
t(LOW) | SCL clock low period | 1300 | ns | ||
t(HIGH) | SCL clock high period | 600 | ns | ||
tF | Data fall time | 300 | ns | ||
tF | Clock fall time | 300 | ns | ||
tR | Clock rise time | 300 | ns | ||
I2C BUS (HIGH-SPEED MODE) | |||||
F(SCL) | I2C clock frequency | 10 | 2940 | kHz | |
t(BUF) | Bus free time between STOP and START conditions | 160 | ns | ||
t(HDSTA) | Hold time after a repeated START condition. After this period, the first clock is generated. | 100 | ns | ||
t(SUSTA) | Repeated START condition setup time | 100 | ns | ||
t(SUSTO) | STOP condition setup time | 100 | ns | ||
t(HDDAT) | Data hold time | 10 | 125 | ns | |
t(SUDAT) | Data setup time | 20 | ns | ||
t(LOW) | SCL clock low period | 200 | ns | ||
t(HIGH) | SCL clock high period | 60 | ns | ||
tF | Data fall time | 80 | ns | ||
tF | Clock fall time | 40 | ns | ||
tR | Clock rise time | 40 | ns |
at TA = 25 °C, VVS = 3.3 V, VCM = 48 V, VSENSE = 0, and VVBUS = 48 V (unless otherwise noted)
VCM = 48 V |
VCM = 24 V |
VVBUS = 20 mV |
VCM = 0 V |
VCM = 24 V |
VVBUS = 20 mV |