SBOS775C September   2016  – March 2019 INA302 , INA303

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Current Sensing
      2. 7.3.2 Out-of-Range Detection
      3. 7.3.3 Alert Outputs
        1. 7.3.3.1 Setting Alert Thresholds
          1. 7.3.3.1.1 Resistor-Controlled Current Limit
            1. 7.3.3.1.1.1 Resistor-Controlled Current Limit: Example
          2. 7.3.3.1.2 Voltage-Source-Controlled Current Limit
        2. 7.3.3.2 Hysteresis
    4. 7.4 Device Functional Modes
      1. 7.4.1 Alert Operating Modes
        1. 7.4.1.1 Transparent Output Mode
        2. 7.4.1.2 Latch Output Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Selecting a Current-Sensing Resistor (RSENSE)
        1. 8.1.1.1 Selecting a Current-Sensing Resistor: Example
      2. 8.1.2 Input Filtering
      3. 8.1.3 Using the INA30x With Common-Mode Transients Greater Than 36 V
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

at TA = 25°C, VSENSE = 0 V, VREF = VS / 2, VS = 5 V, VIN+ = 12 V, VLIMIT1 = 3 V, and VLIMIT2 = 3 V (INA302) or 2 V (INA303) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VIN Differential input voltage range VIN = VIN+ – VIN–, VREF = VS / 2, 
A1 versions		 0 ±125 mV
VIN = VIN+ – VIN–, VREF = VS / 2,
A2 versions		 0 ±50
VIN = VIN+ – VIN–, VREF = VS / 2,
A3 versions		 0 ±25
CMRR Common-mode rejection ratio VIN+ = 0 V to 36 V,
TA = –40ºC to +125ºC, A1 versions		 100 114 dB
VIN+ = 0 V to 36 V, TA = –40ºC to +125ºC, A2 versions 106 118
VIN+ = 0 V to 36 V,
TA = –40ºC to +125ºC, A3 versions		 110 120
VOS Offset voltage, RTI(1) A1 versions ±15 ±80 µV
A2 versions ±10 ±50
A3 versions ±5 ±30
dVOS/dT Offset voltage drift, RTI(1) TA= –40ºC to +125ºC 0.02 0.25 µV/°C
PSRR Power-supply rejection ratio VS = 2.7 V to 5.5 V, VIN+ = 12 V,
TA = –40ºC to +125ºC		 ±0.3 ±5 µV/V
IB Input bias current IB+, IB– 115 µA
IOS Input offset current VSENSE = 0 mV ±0.01 µA
OUTPUT
G Gain A1 versions 20 V/V
A2 versions 50
A3 versions 100
Gain error VOUT = 0.5 V to VS – 0.5 V, A1 versions ±0.02% ±0.075%
VOUT = 0.5 V to VS – 0.5 V, A2 versions ±0.05% ±0.1%
VOUT = 0.5 V to VS – 0.5 V, A3 versions ±0.1% ±0.15%
TA= –40ºC to +125ºC 3 10 ppm/°C
Nonlinearity error VOUT = 0.5 V to VS – 0.5 V ±0.01%
Maximum capacitive load No sustained oscillation 500 pF
VOLTAGE OUTPUT
Swing to VS power-supply rail RL = 10 kΩ to GND,
TA = –40ºC to +125ºC		 VS – 0.05 VS – 0.1 V
Swing to GND RL = 10 kΩ to GND,
TA = –40ºC to +125ºC		 VGND + 15 VGND + 30 mV
FREQUENCY RESPONSE
BW Bandwidth A1 versions, COUT = 500 pF 550 kHz
A2 versions, COUT = 500 pF 440
A3 versions, COUT = 500 pF 400
SR Slew rate 4 V/µs
NOISE, RTI(1)
Voltage noise density 30 nV/√Hz
COMPARATOR
tp Total alert propagation delay Comparator 1, input overdrive = 1 mV 0.6 1 µs
Comparator 2, input overdrive = 1 mV, delay = 100 kΩ to VS 1.25 2
Slew-rate-limited tp Comparator 1, VOUT step = 0.5 V to 4.5 V, VLIMIT = 4 V 1 1.5 µs
Comparator 2 (INA302),
VOUT step = 0.5 V to 4.5 V, VLIMIT = 4 V, delay = 100 kΩ to VS 		1.5 2.5
Comparator 2 (INA303),
VOUT step = 4.5 V to 0.5 V, VLIMIT = 1 V, delay = 100 kΩ to VS 		1.5 2.5
ILIMIT1 Limit threshold output current,
comparator 1		 TA = 25ºC, VLIMIT1 < VS – 0.6 V 79.2 80 80.8 µA
TA = –40ºC to +125ºC, 
VLIMIT1 < VS – 0.6 V		 78.4 81.6
ILIMIT2 Limit threshold output current,
comparator 2		 TA = 25ºC, VLIMIT2 < VS – 0.6 V 79.7 80 80.4 µA
TA = –40ºC to +125ºC, 
VLIMIT2 < VS – 0.6 V		 79.2 80.8
VOS Offset voltage, both comparators A1 versions 0.5 3.5 mV
A2 versions 0.5 3.5
A3 versions 0.5 4.0
HYS Hysteresis comparator 1, comparator 2 100 mV
Internal programmable delay error TA = –40ºC to +125ºC 4%
VTH Delay threshold voltage TA = –40ºC to +125ºC 1.21 1.22 1.23 V
ID Delay charging current TA = –40ºC to +125ºC, VDELAY = 0.6 V 4.85 5 5.15 µA
RD Delay discharge resistance 70 Ω
VIH LATCH1, LATCH2 high-level input voltage TA = –40ºC to +125ºC 1.4 6 V
VIL LATCH1, LATCH2 low-level input voltage TA = –40ºC to +125ºC 0 0.4 V
VOL Alert low-level output voltage IOL = 3 mA, TA = –40ºC to +125ºC 70 400 mV
ALERT1, ALERT2 pin leakage input current VOH = 3.3 V 0.1 1 µA
LATCH1, LATCH2 digital leakage input current 0 V ≤ VLATCH1 , VLATCH2 ≤ VS 1 µA
POWER SUPPLY
IQ Quiescent current TA = 25ºC 850 950 µA
TA = –40ºC to +125ºC 1150
(1) RTI = referred-to-input.