SBOSAG2 june   2023 INA351A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Gain-Setting
        1. 8.3.1.1 Gain Error and Drift
      2. 8.3.2 Input Common-Mode Voltage Range
      3. 8.3.3 EMI Rejection
      4. 8.3.4 Typical Specifications and Distributions
      5. 8.3.5 Electrical Overstress
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Reference Amplifier
      2. 9.1.2 Input Bias Current Return Path
    2. 9.2 Typical Applications
      1. 9.2.1 Resistive-Bridge Pressure Sensor
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DSG|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

For VS = (V+) – (V–) = 1.8 V to 5.5 V (±0.9 V to ±2.75 V) at TA = 25°C,  VCM = [(VIN+) + (VIN–)] / 2 = VS / 2, VIN = (VIN+) – (VIN–) = 0 V, VA_IN+ = VS / 2, VA_IN– = VA_OUT,  G = 10, RL = 10 kΩ connected to VS / 2, and VOUT = VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VOSI Offset Voltage, RTI(1) VS = 5.5 V TA = 25°C ±0.2 ±1.3 mV
Offset Voltage over T, RTI(1) VS = 5.5 V TA = –40°C to 125°C ±1.4 mV
Offset temp drift, RTI(2) VS = 5.5 V TA = –40°C to 125°C ±0.60 µV/°C
PSRR Power-supply rejection ratio TA = 25°C   20 75 µV/V
ZIN-DM Differential Impedance 100 || 5 GΩ || pF
ZIN-CM Common Mode Impedance 100 || 9 GΩ || pF
VCM Input Stage Common Mode Range(3) (V–) (V+)  V
CMRR DC Common-mode rejection ratio, RTI VCM = (V–) + 0.1 V to (V+) – 1 V, High CMRR Region VS = 5.5 V 86 103 dB
VCM = (V–) + 0.1 V to (V+) – 1 V, High CMRR Region VS = 3.3 V 94
VCM = (V–) + 0.1 V to (V+) – 0.1 V VS = 5.5 V 62 75
BIAS CURRENT
IB Input bias current VCM = VS / 2 ±0.75 pA
IOS Input offset current VCM = VS / 2 ±0.40 pA
NOISE VOLTAGE
eNI Input referred voltage noise density(5) f = 1 kHz 36 nV/√Hz
f = 10 kHz 35
ENI Input referred voltage noise(5) fB = 0.1 Hz to 10 Hz 3.0 µVPP
in Input current noise f = 1 kHz 22 fA/√Hz
GAIN
GE Gain error(4) VREF = VS/2 VO = (V–) + 0.1 V to (V+) – 0.1V ±0.02 ±0.10 %
OUTPUT
VOH Positive rail headroom RL = 10 kΩ to VS/2 15 30 mV
VOL Negative rail headroom RL = 10 kΩ to VS/2 15 30 mV
CL Drive Load capacitance drive VO = 100 mV step, Overshoot < 20% 500 pF
ZO Closed-loop output impedance f = 10 kHz 51 Ω
ISC Short-circuit current VS = 5.5 V ±20 mA
FREQUENCY RESPONSE
BW Bandwidth, –3 dB VIN = 10 mVpk-pk 100 kHz
THD + N Total harmonic distortion + noise VS = 5.5 V, VCM = 2.75 V, VO = 1 VRMS, RL = 100 kΩ
ƒ = 1 kHz, 80-kHz measurement BW		 0.035 %
EMIRR Electro-magnetic interference rejection ratio f = 1 GHz, VIN_EMIRR = 100 mV 96 dB
SR Slew rate VS = 5 V, VO = 2 V step 0.20 V/µs
tS Settling time To 0.1%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF 14 µs
To 0.01%, VS = 5.5 V, VSTEP = 2 V, CL = 10 pF 24
Overload recovery VIN = 1 V 8 µs
REFERENCE AMPLIFIER
REF - VOS Ref. input offset voltage VS = 5.5 V(4) ±0.6 ±2.25 mV
REF - VOS Ref. input offset voltage drift VS = 5.5 V ±0.8 µV/℃
REF - IB Ref. input bias current VS = 5.5 V ±1 pA
REF - ZINCM Ref. common mode input impedance 100 || 0.5 GΩ || pF
REF - EN Ref. input voltage noise  f = 0.1 to 10 Hz 8.7 µVPP
REF - eN Ref. input voltage noise density f = 10 kHz 64 nV/√Hz
REF - VIN Ref. input voltage range VS = 5.5 V (V–)  (V+)  V
REF - AOL Ref. open loop voltage gain (V–) + 0.1 V < VO < (V+) – 0.1 V VS = 5.5 V 120 dB
REF - GBW Ref. gain-bandwidth product VS = 5.5 V 360 kHz
REF - tS Ref. settling time To 0.1%, VS = 5.5 V, VSTEP = 2 V, G = 1, CL = 10 pF 25 µs
REF - PM Ref. phase margin VS = 5.5 V, G = 1, CL = 10 pF 65 °
REF - VO Ref. voltage output swing from rail VS = 5.5 V, G = 1 175 mV
REF - ISC Ref. short circuit current VS = 5.5 V, G = 1 ±3 mA
POWER SUPPLY
VS Power-supply voltage Single-supply 1.8 5.5 V
Dual-supply ±0.85 ±2.75
IQ Quiescent current VIN = 0 V 110 135 µA
TA = –40°C to 125°C 147
(1) Total offset, referred-to-input (RTI): VOS = (VOSI) + (VOSO / G).
(2) Offset drifts are uncorrelated. Input-referred offset drift is calculated using: ΔVOS(RTI) = √[ΔVOSI2 + (ΔVOSO / G)2]
(3) Input common mode voltage range of the just the input stage of the instrumentation amplifier. The entire INA351 input range depends on the combination input common-mode voltage, differential voltage, gain, A_OUT voltage and power supply voltage. Typical Characteristic curves will be added with more information.
(4) Min and Max values are specified by characterization.
(5) Total RTI voltage noise is equal to: eN(RTI) = √[eNI2 + (eNO / G)2]