SBOSAD4 June   2024 INA4230

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements (I2C)
    7. 5.7 Timing Diagram
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Integrated Analog-to-Digital Converter (ADC)
      2. 6.3.2 Internal Measurement and Calculation Engine
      3. 6.3.3 Low Bias Current
      4. 6.3.4 Low Voltage Supply and Wide Common-Mode Voltage Range
      5. 6.3.5 ALERT Pin
    4. 6.4 Device Functional Modes
      1. 6.4.1 Continuous Versus Triggered Operation
      2. 6.4.2 Device Low Power Modes
      3. 6.4.3 Power-On Reset
      4. 6.4.4 Averaging and Conversion Time Considerations
    5. 6.5 Programming
      1. 6.5.1 I2C Serial Interface
      2. 6.5.2 Writing to and Reading Through the I2C Serial Interface
      3. 6.5.3 High-Speed I2C Mode
      4. 6.5.4 General Call Reset
      5. 6.5.5 SMBus Alert Response
  8. Register Maps
    1. 7.1 Device Registers
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Device Measurement Range and Resolution
      2. 8.1.2 Current and Power Calculations
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select the Shunt Resistor
        2. 8.2.2.2 Configure the Device
        3. 8.2.2.3 Program the Shunt Calibration Registers
        4. 8.2.2.4 Set Desired Fault Thresholds
        5. 8.2.2.5 Calculate Returned Values
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Set Desired Fault Thresholds

The INA4230 has the ability to assert the alert pin on several different fault conditions as described in Alert Configuration Registers. The desired fault condition to assert the alert pin needs to be selected by appropriately programming the ALERT MASK field in the Alert Configuration Register. Fault thresholds are set by programming the desired trip threshold into the Alert Limit Registers.

For example, channel 1 can be configured to alert on an over current condition by setting the ALERT1 register CHANNEL field to channel 1(00b) with the ALERT MASK field set to shunt over voltage (001b). The desired threshold for the over current condition has to be programmed in the Limit1 Register. In this example, the over current threshold is 9.0A and the value of the current sense resistor is 8.0mΩ, which give a shunt voltage limit of 72mV. Once the shunt voltage limit is known, the value for the shunt over voltage limit register is calculated by dividing the shunt voltage limit by the shunt voltage LSB size.

For this case, the calculated value of the alert limit register is 72mV / 2.5μV = 28800d (7080h).

Values stored in the LIMIT1 to LIMIT4 registers are set to the default values when the device is disabled or VS is power cycled.

Fault limits programmed into the LIMIT registers can be applied to a single channel or distributed to each of the 4 measurement channels. For example, if monitoring of the bus voltage was also required on channel 1, the CHANNEL field of the ALERT2 register can be also set to channel 1(00b) with the ALERT MASK field set to monitor over bus conditions (011b). The value for the over voltage fault can be set as desired in the LIMIT2 register.