SBOS914F October   2018  – April 2021 INA592

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: G = 1/2
    6. 7.6 Electrical Characteristics: G = 2
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Basic Power Supply and Signal Connections
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Operating Voltage
          2. 9.2.1.2.2 Offset Voltage Trim
          3. 9.2.1.2.3 Input Voltage Range
          4. 9.2.1.2.4 Capacitive Load Drive Capability
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Additional Applications
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-79D17A30-FFE8-4C54-929B-7A5A94074D60-low.gifFigure 6-1 D (8-Pin SOIC) and DGK (8-Pin VSSOP) Packages, Top View
GUID-20210211-CA0I-J0DQ-PWZG-BNRD1DQ2XJDH-low.svgFigure 6-2 DRC (10-Pin VSON With Thermal Pad) Package, Top View
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
D (SOIC),
DGK (VSSOP)		 DRC (VSON)
+IN 3 4 I 12-kΩ resistor to noninverting terminal of op amp.
Used as positive input in G = ½ configuration.
Used as reference pin in G = 2 configuration.
–IN 2 3 I 12-kΩ resistor to inverting terminal of op amp.
Used as negative input in G = ½ configuration.
Connect to output in G = 2 configuration.
+INOP — 10 I Direct connection to noninverting terminal of op amp
–INOP — 1 I Direct connection to inverting terminal of op amp
NC 8 9 — No internal connection (can be left floating)
OUT 6 7 O Output
REF 1 2 I 6-kΩ resistor to noninverting terminal of op amp.
Used as reference pin in G = ½ configuration.
Used as positive input in G = 2 configuration.
SENSE 5 6 I 6-kΩ resistor to inverting terminal of op amp.
Connect to output in G = ½ configuration.
Used as negative input in G = 2 configuration.
V+ 7 8 — Positive (highest) power supply
V– 4 5 — Negative (lowest) power supply