SBOSAB4A May   2023  – September 2023 INA700

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements (I2C)
    7. 6.7 Timing Diagram
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Integrated Shunt Resistor
      2. 7.3.2 Safe Operating Area
      3. 7.3.3 Versatile Measurement Capability
      4. 7.3.4 Internal Measurement and Calculation Engine
      5. 7.3.5 High-Precision Delta-Sigma ADC
        1. 7.3.5.1 Low Latency Digital Filter
        2. 7.3.5.2 Flexible Conversion Times and Averaging
      6. 7.3.6 Integrated Precision Oscillator
      7. 7.3.7 Multi-Alert Monitoring and Fault Detection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 I2C Serial Interface
        1. 7.5.1.1 Writing to and Reading Through the I2C Serial Interface
        2. 7.5.1.2 High-Speed I2C Mode
        3. 7.5.1.3 SMBus Alert Response
    6. 7.6 Register Maps
      1. 7.6.1 INA700 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Device Measurement Range and Resolution
      2. 8.1.2 ADC Output Data Rate and Noise Performance
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Configure the Device
        2. 8.2.2.2 Set Desired Fault Thresholds
        3. 8.2.2.3 Calculate Returned Values
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

at TA = 25 °C, VS = 3.3 V, ISENSE  = 0 A, VCM = VIN– = VBUS= 12 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
CMRR Common-mode rejection –0.3 V < VCM < 40 V, TA = –40°C to +105°C ±1 ±100 µA/V
Ios Input offset current TCT > 280 µs ±0.48 ±1.5 mA
dVos/dT Input offset current drift TA = –40°C to +105°C ±50 ±250 µA/°C
PSRR Input offset current vs power supply VS = 2.7 V to 5.5 V, TA = –40°C to +105°C ±0.05 ±0.7 mA/V
Vos_bus VBUS offset voltage ±6.2 ±15 mV
dVos/dT VBUS offset voltage drift TA = –40°C to +105°C ±4 ±40 µV/°C
PSRR VBUS offset voltage vs power supply VS = 2.7 V to 5.5 V ±1.1 mV/V
DC ACCURACY
GSERR System current sense gain error (1) ISENSE = 5 A, TA = 25°C ±0.1 ±0.5 %
ISENSE = 10 A, TA = 25°C ±1.25 %
GS_DRFT System current sense gain error drift –40°C ≤ TA ≤ 105°C ±15 ±50 ppm/°C
GBERR VBUS voltage gain error VCM = 0 V to 40 V, TA = 25°C ±0.05 ±0.2 %
GB_DRFT VBUS voltage gain error drift –40°C ≤ TA ≤ 105°C ±30 ppm/°C
IBUS VBUS leakage current Device enabled with active conversions 12 µA
PTME Power total measurement error (TME) TA = 25°C, VCM = 12V, ILOAD = 5A ±0.15 ±0.85 %
ETME Energy and charge TME TA = 25°C, VCM = 12V, ILOAD = 5A ±0.25 ±1.35 %
ADC resolution 16 Bits
1 LSB step size Current 480 µA
Bus voltage 3.125 mV
Temperature 125 m°C
Power 96 µW
Energy 1.536 mJ
Charge 30 µC
TCT ADC conversion-time(2) Conversion time field = 0h  50 µs
Conversion time field = 1h  84
Conversion time field = 2h  150
Conversion time field = 3h  280
Conversion time field = 4h  540
Conversion time field = 5h 1052
Conversion time field = 6h 2074
Conversion time field = 7h  4120
INL Integral Non-Linearity Internal ADC ±5 m%
CLOCK SOURCE
FOSC Internal oscillator frequency 1 MHz
OSCTOL Internal oscillator frequency tolerance TA = 25°C ±0.07 ±0.5 %
TA = –40°C to +105°C ±0.14 ±1 %
TEMPERATURE SENSOR
Measurement range –40 +125 °C
Temperature accuracy TJ = 25°C +1.3 ±2.5 °C
TJ= –40°C to +125°C +1.5 ±3 °C
INTEGRATED SHUNT
Internal kelvin resistance TA = 25°C 2 mΩ
Pin to pin package resistance IN+ to IN–, TA = 25°C 2.2 3.6 5 mΩ
Maximum shunt current(3) TA = 25°C ±15 A
TA = 65°C ±10 A
Short time overload change ISENSE = 20 A for 5 seconds ±0.02 %
Change due to temperature cycling –55°C ≤ TJ ≤ 125°C, 700 cycles ±0.35 %
Resistance change to solder heat 260°C solder, 10 s ±0.03 %
Load life change 1000 hours, TJ = 125°C, ISENSE = 7A, 100% loading ±0.7 %
High temperature exposure change 1000 hours, TA = 150°C, unbiased ±0.7 %
Cold temperature storage change 24 hours, TA = –65°C, unbiased ±0.2 %
POWER SUPPLY
VS Supply voltage 2.7 5.5 V
IQ Quiescent current VSENSE = 0 V 640 700 µA
VSENSE = 0 V, TA = –40°C to +105°C 1.1 mA
IQSD Quiescent current, shutdown Shutdown mode 2.8 5 µA
TPOR Device start-up time Power-up (NPOR) 300 µs
From shutdown mode 60
DIGITAL INPUT / OUTPUT
VIH Logic input level, high SDA, SCL 1.2 5.5 V
VIL Logic input level, low GND 0.4 V
VOL Logic output level, low IOL = 3 mA GND 0.4 V
IIO_LEAK Digital leakage input current 0 ≤ VIN ≤ VS –1 1 µA
(1) Includes solder down and silicon lifetime shifts.  Shifts in the shunt are not included; see the Load Life specification for shunt aging shifts.
(2) Subject to oscillator accuracy and drift
(3) See Figure 7-3 for additional current limitations