Accessing a specific register on the INA745x is accomplished by writing the appropriate value to the register pointer. Refer to Register MapsRegister MapsRegister Maps for a complete list of registers and corresponding addresses. The value for the register pointer (as shown in Figure 6-14) is the first byte transferred after the target address byte with the R/W bit low. Every write operation to the device requires a value for the register pointer.

Writing to a register begins with the first byte transmitted by the controller. This byte is the target address, with the R/W bit low. The device then acknowledges receipt of a valid address. The next byte transmitted by the controller is the address of the register to be accessed. This register address value updates the register pointer to the desired internal device register. The next two bytes are written to the register addressed by the register pointer. The device acknowledges receipt of each data byte. The controller may terminate data transfer by generating a start or stop condition.

When reading from the device, the last value stored in the register pointer by a write operation determines which register is read during a read operation. To change the register pointer for a read operation, a new value must be written to the register pointer. This write is accomplished by issuing a target address byte with the R/W bit low, followed by the register pointer byte. No additional data are required. The controller then generates a start condition and sends the address byte for the target with the R/W bit high to initiate the read command. The next byte is transmitted by the target and is the most significant byte of the register indicated by the register pointer. This byte is followed by an Acknowledge from the controller; then the target transmits the least significant byte. The controller may or may not acknowledge receipt of the second data byte. The controller may terminate data transfer by generating a Not-Acknowledge after receiving any data byte, or generating a start or stop condition. If repeated reads from the same register are desired, it is not necessary to continually send the register pointer bytes; the device retains the register pointer value until it is changed by the next write operation.

Figure 6-12 shows the write operation timing diagram. Figure 6-13 shows the read operation timing diagram. These diagrams are shown for reading and writing to 16-bit registers.

Register bytes are sent most significant byte (MSB) first, followed by the least significant byte (LSB).

A. The value of the target address byte is determined by the settings of the A0 and A1 pins. Refer to Table 6-2.

B. The device does not support packet error checking (PEC) or perform clock stretching.

Figure 6-12 Timing Diagram for Write Word Format

A. The value of the target address byte is determined by the settings of the A0 and A1 pins. Refer to Table 6-2.

B. Read data is from the last register pointer location. If a new register is desired, the register pointer must be updated. See Figure 6-14.

C. ACK by the controller can also be sent.

D. The device does not support packet error checking (PEC) or perform clock stretching.

Figure 6-13 Timing Diagram for Read Word Format

A. The value of the target address byte is determined by the settings of the A0 and A1 pins. Refer to Table 6-2.

Figure 6-14 Typical Register Pointer Set